zl50411 Zarlink Semiconductor, zl50411 Datasheet - Page 52

• Manufacturer Part Number: zl50411
• Description: Managed 9-port Fast Ethernet Switch With Private Vlan
• Manufacturer: Zarlink Semiconductor

mirrored port. In the same way, if destination is selected, any packet received with mirroring MAC address as
destination MAC address will be copied to the mirrored port.
In flow based mirroring, a flow is established based on the source and destination mac address pair. When
enabled, a packet with source and destination address match the pre-programmed source and destination mac
address pair will be copied to the mirrored port. In reverse direction (source and destination match pre programmed
destination and source), the flow can also be enabled and the frame will be copied to the mirrored port.
In port based mirroring, traffic from any RMII port can be mirrored to any other RMII port. The traffic from the source
port can be either ingress or egress traffic. Up to two ports can be setup as mirrored ports. As a result, the traffic
(both ingress and egress) of a specific port can be monitored by setting up both mirrored ports. Once a port is setup
as mirrored port, it cannot be used for regular traffic.
The mirrored port can be any port in the ZL50411.
9.2
To perform remote loop back test, port mirroring can be used to bounce back the packet to the source port to check
the data path.
The CPU needs to setup the remote device through the command channel to enable port mirroring in the remote
device. A CPU packet is send to the port in test in Device A. The packet will be forwarded to the test port, external
cable, the destination port in Device B, and loop back to itself, back to the cable and go back to Device A and the
CPU. This way, the whole channel can be tested.
10.0
10.1
10.1.1
SCLK is the primary clock for the ZL50411 device. The speed requirement is based on the system configuration.
Below is a table for a few configuration.
6-9 ports 10/100 M
1-5 ports 10/100 M
Using port mirroring for loop back
Clock Requirements
Clocks
System Clock (SCLK) Speed Requirement
DEVICE A
CPU
Configuration
Table 11 - SCLK Speed Requirements
Figure 13 - Remote Loopback Test
Zarlink Semiconductor Inc.
ZL50411
52
50 MHz
25 Mhz
Minimum SCLK speed
DEVICE B
required
Data Sheet