zl50411 Zarlink Semiconductor, zl50411 Datasheet - Page 75

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zl50411

Manufacturer Part Number
zl50411
Description
Managed 9-port Fast Ethernet Switch With Private Vlan
Manufacturer
Zarlink Semiconductor
Datasheet

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12.3.1.2
I²C Address: h00A+n; CPU Address: h0001+2n (n = port number)
Accessed by CPU and I²C (R/W)
Bit [3]
Bit [4]
Bit [5]
Bits [7:6]
Bit [0]:
Bit [1]:
Bit [2]:
Bit [3]:
Bit [4]
ECR2Pn: Port n Control Register
Asymmetric Flow Control Enable.
1 - MII Port Up
0 - MII Port Down
Note: Bit [4] must be ‘1’.
Must be ‘1’.
0 – Disable asymmetric flow control (Default)
1 – Enable Asymmetric flow control
When this bit is set and flow control is on (bit [0] = 0), the device does not send out
flow control frames, but it’s receiver interprets and processes flow control frames.
SS - Spanning tree state (IEEE 802.1D spanning tree protocol)
00 - Blocking:
01 - Listening:
10 - Learning:
11 - Forwarding:
0: Disable (Default)
1: All untagged frames from this port are discarded or follow security option when
security is enable
Filter Tag frame
0: Disable (Default)
1: All tagged frames from this port are discarded or follow security option when
security is enable
0: Learning is enabled on this port (Default)
1: Learning is disabled on this port
Rate control timer select (RMAC ports only)
0: 10 microsecond refreshing time (Default)
1: 1 millisecond refreshing time
Force VLAN Tag Out
0: Disable (Default)
1: Enable
If this feature is enabled, a packet leaving the device will ALWAYS have a VLAN
tag. Only applicable in tagged-based VLAN mode (PVMODE[0]=’1’). In port-based
VLAN mode (PVMODE[0]=’0’), this bit must be 0.
Filter untagged frame
Learning Disable
The configuration in ECR1Pn[2:0] is used for (speed/duplex/flow control)
setup.
Frame is dropped
Frame is dropped
Frame is dropped. Source MAC address is learned.
Frame is forwarded. Source MAC address is learned. (Default)
Zarlink Semiconductor Inc.
ZL50411
75
Data Sheet

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