z8fmc16100 ZiLOG Semiconductor, z8fmc16100 Datasheet - Page 217
z8fmc16100
Manufacturer Part Number
z8fmc16100
Description
Z8 Encore Motor Control Flash Mcus
Manufacturer
ZiLOG Semiconductor
Datasheet
1.Z8FMC16100.pdf
(381 pages)
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Table 109. Sample Hold Time (ADCST)
Table 110. ADC Clock Prescale Register (ADCCP)
BITS
FIELD
RESET
R/W
ADDR
BITS
FIELD
RESET
R/W
ADDR
PS024611-0408
Bit Position
[7:6]
[5:0]
SHT
Bit Position
[0]
DIV2
ADC Clock Prescale Register
7
7
The ADC Clock Prescale register
the ADC. When this register is programmed with
ADC Clock.
Reserved
Value (H)
Value (H)
0H–FH
R/W
0H
0
0
1
6
6
Reserved
Description
Reserved—Must be 0.
Sample Hold time in number of system clock periods to meet 1
minimum.
Description
DIV2
Clock is not divided
System Clock is divided by 2 for ADC Clock
0
5
1
5
(Table
4
1
4
F75H
F76H
R/W
110) is used to provide a divided system clock to
DIV16
3
1
3
0
R/W
0h
ST
Z8FMC16100 Series Flash MCU
, the System Clock is used for the
DIV8
2
1
2
0
ADC Clock Prescale Register
Product Specification
DIV4
1
1
1
0
µ
s
DIV2
0
1
0
0
205
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