z8fmc16100 ZiLOG Semiconductor, z8fmc16100 Datasheet - Page 211

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z8fmc16100

Manufacturer Part Number
z8fmc16100
Description
Z8 Encore Motor Control Flash Mcus
Manufacturer
ZiLOG Semiconductor
Datasheet

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PS024611-0408
SAMPLE/HOLD
Caution:
Internal signal
Internal signal
START bit
ADC Timing
BUSY
To avoid disrupting a conversion already in progress, the
ADC operation status (busy or available).
Starting a new conversion while another conversion is in progress will stop the conversion
in progress and the new conversion will not complete.
Each ADC measurement consists of 3 phases:
1. Input sampling (programmable, minimum of 1.0 µs).
2. Sample-and-hold amplifier settling (programmable, minimum of 0.5 µs).
3. Conversion is 13 ADCLK cycles.
Figure 37
displays the control and flow of an ADC conversion.
Set by user
Figure 37. ADC Timing Diagram
μ
Programmable
settling period
Z8FMC16100 Series Flash MCU
Conversion period
START
Cleared by BUSY
Product Specification
bit can be read to indicate
Conversion period
13-clock
ADC Timing
199

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