z8fmc16100 ZiLOG Semiconductor, z8fmc16100 Datasheet - Page 171

• Manufacturer Part Number: z8fmc16100
• Description: Z8 Encore Motor Control Flash Mcus
• Manufacturer: ZiLOG Semiconductor

Table 88. SPI Diagnostic State Register (SPIDST)
PS024611-0408
BITS
FIELD
RESET
R/W
ADDR
SPI Diagnostic State Register
SCKEN
7
SSIO—Slave Select I/O
0 = SS pin configured as an input.
1 = SS pin configured as an output (MASTER mode only).
SSV—Slave Select Value
If SSIO = 1 and SPI configured as a Master:
0 = SS pin driven Low (0).
1 = SS pin driven High (1).
This bit has no effect if SSIO = 0 or SPI configured as a Slave
The SPI Diagnostic State register provides observability of internal state. It is a read-only
register used for SPI diagnostics. More detail about each bit follows the table.
SCKEN - Shift Clock Enable
0 = The internal Shift Clock Enable signal is deasserted
1 = The internal Shift Clock Enable signal is asserted (shift register is updates on next sys-
tem clock)
TCKEN - Transmit Clock Enable
0 = The internal Transmit Clock Enable signal is deasserted.
1 = The internal Transmit Clock Enable signal is asserted. When this is asserted the serial
data out is updated on the next system clock (MOSI or MISO).
SPISTATE - SPI State Machine
Defines the current state of the internal SPI State Machine.
110 = 6 bits
111 = 7 bits
TCKEN
6
5
4
F64H
00H
R
3
SPISTATE
Z8FMC16100 Series Flash MCU
2
SPI Diagnostic State Register
Product Specification
1
0
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