z8fmc16100 ZiLOG Semiconductor, z8fmc16100 Datasheet - Page 206

• Manufacturer Part Number: z8fmc16100
• Description: Z8 Encore Motor Control Flash Mcus
• Manufacturer: ZiLOG Semiconductor

Table 103. Comparator and Op Amp Control Register (CMPOPC)
BITS
FIELD
RESET
R/W
ADDR
PS024611-0408
Operational Amplifier Operation
Interrupts
Comparator and Op Amp Control Register
OPEN
R/W
7
0
To operate, the operational amplifier must be enabled by setting the
Comparator and Op Amp Register to 1. In addition, the OPINP, OPINN, and OPOUT
alternate functions must be enabled on their respective GP I/O pins. For more information,
see
The logical value of the operational amplifier output (OPOUT) can be read from the Port 3
data input register if both the operational amplifier and input pin Schmitt trigger are
enabled. For more information, see
amplifier can also generate an interrupt through the GPIO Port B3 input interrupt, if
enabled.
The output of the operational amplifier is also connected to an analog input (ANA3) of the
Analog-to-Digital Converter (ADC) multiplexer.
The operational amplifier does not automatically power-down. To reduce operating
current when not in use, the operational amplifier is disabled by clearing the
the Comparator and Op Amp register to 0. When the operational amplifier is disabled, the
output is high-impedance. Operation of operational amplifier in unity gain mode may
require external compensation.
The comparator generates an interrupt on any change in the logic output value (from 0 to 1
and 1 to 0). For information on enabling and prioritization of the comparator interrupt, see
Interrupt Controller
The Comparator and Op Amp Control (CMPOPC) register
comparator and operational amplifier and provides access to the comparator output.
GPIO Alternate Functions
6
Reserved
R/W
00
on page 49.
5
on page 34.
CPSEL
R/W
GPIO Alternate Functions
4
0
F90H
CMPIRQ
R/W
3
0
Z8FMC16100 Series Flash MCU
CMPIV
R/W
(Table
2
0
Operational Amplifier Operation
on page 34. The operational
Product Specification
103) enables the
CMPOUT
R
X
1
OPEN
OPEN
CMPEN
bit in the
R/W
0
0
bit in
194