st20-gp1 STMicroelectronics, st20-gp1 Datasheet - Page 89

• Manufacturer Part Number: st20-gp1
• Description: Gps Processor
• Manufacturer: STMicroelectronics

PlinkEmi register
The PlinkEmi register determines the mode of operation of the port.
PlinkIO
The PlinkIO register determines the direction of the port interactions when in the DMA mode of
operation.
PlinkMode
The PlinkMode register determines the external protocol used for interactions.
15.4 External data transfer protocols
The byte-wide parallel port has three control pins. PlinknotReq and PlinknotAck control data
transfers and the PlinkOut pin controls external buffers, if required (e.g. an external 3V/5V buffer
device). When the PlinkOut pin is high it signals the plink is outputting.
The control pins can support three external protocols, as follows:
The protocol used for interactions is programmable via the PlinkMode register. In addition, the
direction of the link is controlled by the PlinkIO register (see Table 15.2).
PlinkEmi
Bit
0
PlinkIO
Bit
0
PlinkMode
Bit
0
•
•
•
Dreq/Dack protocol
Valid/Ack protocol
Direct DMA protocol
Bit field
PlinkEmi
Bit field
PlinkIO
Bit field
PlinkMode
Parallel port base address + #00
Parallel port base address + #04
Parallel port base address + #08
This bit determines the mode of operation of the port.
This bit controls the direction of the parallel port interactions when in DMA mode.
These bits control the external protocol used for interactions.
Function
Function
Function
Table 15.3 PlinkMode register format
Table 15.1 PlinkEmi register format
Table 15.2 PlinkIO register format
PlinkEmi
0
1
PlinkIO
0
1
PlinkMode
00
01
10
11
Mode
DMA mode (reset state)
EMI mode
Direction
inputs (reset state)
outputs
Protocol
Idle (reset state)
Dreq/Dack mode
Valid/Ack mode
Direct mode
Read/Write
Read/Write
Read/Write
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