st20-gp1 STMicroelectronics, st20-gp1 Datasheet - Page 78

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st20-gp1

Manufacturer Part Number
st20-gp1
Description
Gps Processor
Manufacturer
STMicroelectronics
Datasheet
ST20-GP1
An overall interrupt request signal (ASC_interrupt) is generated from the OR of the ErrorInterrupt
signal and the TxEmpty, TxBufEmpty and RxBufFull signals.
Note: the status register cannot be written directly by software. The reset mechanism for the status
register is described below.
The transmitter interrupt status bits (TxEmpty, TxBufEmpty) are reset when a character is written
to the transmitter buffer.
The receiver interrupt status bit (RxBufFull) is reset when a character is read from the receive
buffer.
The error status bits (ParityError, FrameError, OverrunError) are reset when a character is read
from the receive buffer.
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OverrunError
read 0, write 0
TxBufEmpty
FrameError
RESERVED
ASCStatus
ParityError
RxBufFull
TxEmpty
register
Figure 13.4 ASC status and interrupt registers
OverrunErrorIE
TxBufEmptyIE
ASCIntEnable
FrameErrorIE
read 0, write 0
ParityErrorIE
RxBufFullIE
RESERVED
TxEmptyIE
register
&
&
&
&
&
&
OR
Error interrupt
Receive buffer
full interrupt
Transmitter
empty interrupt
Transmit buffer
empty interrupt

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