st20-gp1 STMicroelectronics, st20-gp1 Datasheet - Page 65

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st20-gp1

Manufacturer Part Number
st20-gp1
Description
Gps Processor
Manufacturer
STMicroelectronics
Datasheet
SysRatio
The SysRatio register is a read only register and gives the speed at which the system PLL is running.
It contains the relevant PLL multiply ratio when using the PLL, or contains the value ‘1’ when in
TimesOneMode for the PLL.
WdEnable
Setting the WdEnable register enables the low power alarm counter to be used as a watchdog
timer.
WdFlag
This register can be used to determine if the device was reset by the notRST input or by a
watchdog time-out.
Note that this bit is not reset by the CPUReset input.
10.4 Clocking sources
The low power timer and alarm must be clocked at all times by one of the following clocking sources:
SysRatio
Bit
5:0
WdEnable
Bit
0
WdFlag
Bit
0
External clock input (LPClockIn) — this clock must not be more than one eighth of the sys-
tem clock rate. In this case the LPClockOsc pin should not be connected on the board.
Watch crystal, as in Figure 10.1.
Bit field
SysRatio
Bit field
WdEnable
Bit field
WdFlag
LPC base address + #500
LPC base address + #510
LPC base address + #514
Function
PLL speed, as follows:
Function
Determines whether the low power alarm is set to operate as an alarm or as a
watchdog timer.
Function
Watchdog timer flag.
Table 10.10 WdEnable register format
SysRatio PLL
Table 10.9 SysRatio register format
Table 10.11 WdFlag register format
1
4
6
0
1
0
1
2
alarm
watchdog
set to 0 by an external notRST
set to 1 when the watchdog counter is #1 and the WdEnable register is 1
x1
x2
x3
x1
TimesOneMode
16.368 MHz
32.736 MHz
RESERVED
Read/Write
ST20-GP1
Read
Read
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