st20-gp1 STMicroelectronics, st20-gp1 Datasheet - Page 35
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st20-gp1
Manufacturer Part Number
st20-gp1
Description
Gps Processor
Manufacturer
STMicroelectronics
Datasheet
1.ST20-GP1.pdf
(116 pages)
- Current page: 35 of 116
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6.2
The Primary Instructions Table 6.3 gives the basic function code. Where the operand is less than
16, a single byte encodes the complete instruction. If the operand is greater than 15, one prefix
instruction ( pfix ) is required for each additional four bits of the operand. If the operand is negative
the first prefix instruction will be nfix . Examples of pfix and nfix coding are given in Table 6.1.
Any instruction which is not in the instruction set tables is an invalid instruction and is flagged
illegal, returning an error code to the trap handler, if loaded and enabled.
The Notes column of the tables indicates the descheduling and error features of an instruction as
described in Table 6.2
Instruction characteristics
Mnemonic
is coded as
is coded as
is coded as
Ident
.
O
D
E
L
S
A
T
pfix
pfix
pfix
nfix
I
ldc
ldc
ldc
ldc
ldc
ldc
ldc
Feature
Instruction can set an IntegerError trap
Instruction can cause a LoadTrap trap
Instruction can cause a StoreTrap trap
Instruction can cause an Overflow trap
Interruptible instruction
Instruction can be aborted and later restarted.
Instruction can deschedule
Instruction can timeslice
#3
#35
#3
#5
#987
#9
#8
#7
-31 ( ldc #FFFFFFE1)
#1
#1
Table 6.2 Instruction features
Table 6.1 Prefix coding
Function code
#4
#2
#4
#2
#2
#4
#6
#4
Memory code
#43
#23
#45
#29
#28
#47
#61
#41
ST20-GP1
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