st20-gp1 STMicroelectronics, st20-gp1 Datasheet - Page 13

• Manufacturer Part Number: st20-gp1
• Description: Gps Processor
• Manufacturer: STMicroelectronics

is maintained between the satellite one-millisecond epochs and the receiver, despite time-of-
reception variations due to the varying path length from the satellite.
3.1
The GPS hardware channels of the ST20-GP1 are controlled by three sets of registers:
The base addresses for the DSP registers are given in the Memory Map chapter.
DSPControl register
The DSPControl register determines whether the PRN generators are on (normal use) or disabled
(for built-in-self-test of a system), whether the system is in tracking mode (840/970 s output rate)
or initial acquisition mode (31/62 s), and selects which of the two rates for each mode. It also
determines whether the accumulated carrier phase in the NCO are reset to zero automatically or
continue from their existing value. The bit allocations are given in Table 3.1.
1
2
3
header
16-bit
sync
DSP module registers
DSPControl register
PRNcode0-11 and PRNphase0-11 registers
NCOfrequency0-11 and NCOphase0-11 registers
sample
rate
12 x 16-bit
I values
Absent 16-bit values padded with #8000
62 byte packet every 840/970/31/62 s
Figure 3.2 DSP packet format
Tracking mode
T[7:6] = 10
T[5:0] = time[5:0]
12 x 16-bit
Q values
Acquisition mode
First packet (in SV ms)
T[7:6] = 10
T[5:0] = time[5:0]
Remaining packets
T[7:6] = 00
T[5:0] = sequence number
(sequence numbers are 2 to
16 or 32)
time values
12 x 8-bit
ST20-GP1
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