st20-gp1 STMicroelectronics, st20-gp1 Datasheet - Page 7

• Manufacturer Part Number: st20-gp1
• Description: Gps Processor
• Manufacturer: STMicroelectronics

ST20-GP1
2
ST20-GP1 architecture overview
The ST20-GP1 consists of an ST20 CPU plus application specific DSP hardware for handling GPS
signals, plus a dual channel UART, 8-bit parallel half-duplex link interface, 6-bit parallel IO, real time
clock and watchdog functions.
Figure 2.1 shows the subsystem modules that comprise the ST20-GP1. These modules are
outlined below and more detailed information is given in the following chapters.
DSP
The ST20-GP1 includes DSP hardware for processing signals from the GPS satellites. The DSP
module generates the pseudo-random noise (prn) signals, and de-spreads the incoming signal.
It consists of a down conversion stage that takes the 4 MHz input signal down to nominally zero
frequency both in-phase and quadrature (I & Q). This is followed by 12 parallel hardware channels
for satellite tracking, whose output is passed to the CPU for further software processing at a
programmable interval, nominally every millisecond.
CPU
The Central Processing Unit (CPU) on the ST20-GP1 is the ST20 32-bit processor core. It contains
instruction processing logic, instruction and data pointers, and an operand register. It directly
accesses the high speed on-chip memory, which can store data or programs. The processor can
access up to 4 Mbytes of memory via the programmable memory interface.
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