st20-gp1 STMicroelectronics, st20-gp1 Datasheet - Page 47
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st20-gp1
Manufacturer Part Number
st20-gp1
Description
Gps Processor
Manufacturer
STMicroelectronics
Datasheet
1.ST20-GP1.pdf
(116 pages)
- Current page: 47 of 116
- Download datasheet (734Kb)
Start of external memory
BootEntry #7FFFFFFE Boot entry point
MemStart
MaxInt #7FFFFFFF
#2000E000
#2000C000
#2000A000
#C0000000
#800000E0
#800000D0
#800000C0
#800000B0
#800000A0
#40000000
#20008000
#20006000
#20004000
#20002000
#20000000
#00000000
#80001000
#80000140
#80000130
#80000120
#80000110
#80000100
#800000F0
ADDRESS
Figure 7.1 ST20-GP1 memory map
USE
User code/Data/Stack and Boot ROM
RESERVED
DSP controller peripheral
(registers accessed via CPU device accesses)
Parallel port controller peripheral
(registers accessed via CPU device accesses)
PIO controller peripheral
(registers accessed via CPU device accesses)
ASC1 controller peripheral
(registers accessed via CPU device accesses)
ASC0 controller peripheral
(registers accessed via CPU device accesses)
EMI controller peripheral
(registers accessed via CPU device accesses)
Interrupt and low power controller peripheral
(registers accessed via CPU device accesses)
External peripherals or memory
User code/Data/Stack
Low priority Scheduler trapped process
Low priority Scheduler trap handler
Low priority SystemOperations trapped process
Low priority SystemOperations trap handler
Low priority Error trapped process
Low priority Error trap handler
Low priority Breakpoint trapped process
Low priority Breakpoint trap handler
High priority Scheduler trapped process
High priority Scheduler trap handler
MEMORY
BANK
Bank 3
Bank 2
Bank 1
Bank 0
ST20-GP1
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