st20-gp1 STMicroelectronics, st20-gp1 Datasheet - Page 109

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st20-gp1

Manufacturer Part Number
st20-gp1
Description
Gps Processor
Manufacturer
STMicroelectronics
Datasheet
19.5.3 Direct DMA protocol
In this mode PlinknotAck is active high. The initial (inactive) state of the pin is low.
PLink is output
PLink is input
PLink is input or
output
PlinknotAck
PlinkData0-7
(Output)
PlinkData0-7
(Input)
Figure 19.8 Byte-wide parallel port timings when using the Direct DMA protocol
Symbol Parameter
t
t
t
t
t
t
PALDOX
DOVPAL
PALDIX
DIVPAL
PAHPAL
PALPAH
PlinkData hold after PlinknotAck
falling edge
PlinkData valid to PlinknotAck fall-
ing transition
PlinkData hold after PlinknotAck
falling edge
PlinkData valid to PlinknotAck fall-
ing transition
PlinknotAck high time
PlinknotAck low time
Table 19.7 Timings for Direct mode
t
PAHPAL
t
t
DOVPAL
DIVPAL
Min
330
100
100
220
220
0
16.4 Mhz
Max
270
270
t
PALDIX
t
Min
160
100
100
t
PALPAH
40
70
PALDOX
0
32.7 Mhz
Max
140
140
ST20-GP1
Units
109/116
ns
ns
ns
ns
ns
ns

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