MT90500 Mitel Semiconductor, MT90500 Datasheet - Page 7

• Manufacturer Part Number: MT90500
• Description: Multi-Channel ATM AAL1 SAR
• Manufacturer: Mitel Semiconductor

MT90500
Figure 47 - Local TDM Bus Output Parameters - Negative Frame Pulse ........................................................ 121
Figure 48 - Local TDM Bus - Positive Frame Pulse, 2/4 Sampling .................................................................. 122
Figure 49 - Local TDM Bus - Negative Frame Pulse, 3/4 Sampling................................................................. 123
Figure 50 - Local TDM Bus - Negative Frame Pulse, 4/4 Sampling................................................................. 123
Figure 51 - Intel CPU Interface Timing - Read Access..................................................................................... 124
Figure 52 - Intel CPU Interface Timing - Write Access..................................................................................... 125
Figure 53 - Motorola CPU Interface Timing - Read Access ............................................................................. 126
Figure 54 - Motorola CPU Interface Timing - Write Access.............................................................................. 127
Figure 55 - External Memory Interface Timing - Read Cycle ........................................................................... 129
Figure 56 - External Memory Interface Timing - Write Cycle............................................................................ 130
Figure 57 - Primary UTOPIA Bus - Transmit Timing ........................................................................................ 131
Figure 58 - Primary UTOPIA Bus - Receive Timing ......................................................................................... 132
Figure 59 - Secondary UTOPIA Interface......................................................................................................... 133
Figure 60 - SRTS User Interface Timing .......................................................................................................... 134
Figure 61 - Message Channel Timing .............................................................................................................. 135
Figure 62 - MT90500 Device Application Block Diagram ................................................................................. 137
Figure 63 - UTOPIA Bus Interconnections for Two MT90500s and an AAL5 SAR .......................................... 139
Figure 64 - The MT90500 within a LAN Hub .................................................................................................... 141
Figure 65 - Using the MT90500 with External SAR and ATM Links in a LAN Environment............................. 142
Figure 66 - Access Product using Internal High Speed Cell Bus on the Backplane......................................... 142
Figure 67 - TDM Traffic Transport Over a Cell Bus.......................................................................................... 143
Figure 68 - Connecting CTI Platforms to ATM LANs........................................................................................ 143
Figure 69 - The GO-MVIP, PC-ATM Bus Standard Architecture...................................................................... 144
Figure 70 - SRTS Clocking Application ............................................................................................................ 146
Figure 71 - TDM Payload Switching ................................................................................................................. 154
Figure 72 - TDM-to-TDM Loopback/Switching ................................................................................................. 155
Figure 73 - SCSA Message Bus Application ................................................................................................... 156
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