MT90500 Mitel Semiconductor, MT90500 Datasheet - Page 69

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MT90500

Manufacturer Part Number
MT90500
Description
Multi-Channel ATM AAL1 SAR
Manufacturer
Mitel Semiconductor
Datasheet

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From
External
PHY
Determines which
VCs are
controlled by
which RX_SAR
Control Structures
• •
Main
UTOPIA
Interface
VC Look-up Table
Structures -
one for each
UTOPIA Module
RX_SAR
Control
VC
OAM and
including
UTOPIA
BLOCK,
VPI/VCI
Filtering
RX
Figure 30 - Overview of CBR Data Reception Process
Dictate
received data to
be sent to
specific RX
Circular Buffers
Selection Process
(see Figure 26 on
Receive Cell
Receive
Primary
32-cell
Queue
page 65)
channel being
Buffers - one
for each TDM
RX Circular
received
Internal
Frame
Buffer
TDM
Directs data
from Circular
Buffers to TDM
channels
TDM Module
TDM Clock
Recovery
TDM Bus
Interface
Clock
Logic
Logic
MT90500
Memory to
External
Synchronous
SRAM
Structure
External
Memory
Internal
Control
MT90500
Local TDM Bus
32 x 64 kbps in /
32 x 64 kbps
out
TDM Bus
16 lines
1024 x 64kbps
(max.)
Clock
Signals
69

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