MT90500 Mitel Semiconductor, MT90500 Datasheet - Page 134

• Manufacturer Part Number: MT90500
• Description: Multi-Channel ATM AAL1 SAR
• Manufacturer: Mitel Semiconductor

MT90500
6.2.6
6.2.7
134
SRTS ENA Delay - LOCx1 falling to
CORSIGC asserted
SRTS DATA Delay - LOCx1 falling to
CORSIGD VALID
SRTS ENA Hold Time - LOCx1 falling
to CORSIGC de-asserted
SRTS DATA Hold Time - LOCx1
falling to CORSIGD INVALID
MCCLK Period
MCCLK Pulse Width (HIGH / LOW)
Skew - CLKx2 falling to MCCLK change
Transmit Delay - MCTX to MC
Receive Delay - MC to MCRX
LOCx1
(SRTS CLOCK)
CORSIGC
(SRTSENA)
CORSIGD
(SRTSDATA)
MCTX falling to MC falling
MCTX rising to MC High-Z
MC falling to MCRX falling
MC rising to MCRX rising
Characteristic
SRTS User Interface
Message Channel Interface
Characteristic
t
ENAD
Figure 60 - SRTS User Interface Timing
Table 96 - Message Channel Parameters
t
t
Sym
ENAD
ENAH
t
t
Table 95 - SRTS Interface Parameters
DD
DH
SRTS Bit 3
t
t
t
MCCH/L
t
t
t
MCTDZ
MCTDL
Sym
MCCP
MCCD
MCRD
Min
t
0
0
DD
Min
237
5
4
3
4
3
SRTS Bit 2
Typ
t
DH
Typ
488
244
Max
20
20
SRTS Bit 1
Max
252
22
16
13
15
14
Units
ns
ns
ns
ns
1) LOCx1 = 2.048 MHz (488 ns).
2) C
1) LOCx1 = 2.048 MHz (488 ns).
2) C
C
Note: SRTS is assumed to be
sampled on LOCx1 rising.
C
Note: SRTS is assumed to be
sampled on LOCx1 rising.
Units
L
L
ns
ns
ns
ns
ns
= 50 pF
= 50 pF
L
L
= 50 pF
= 50 pF
SRTS Bit 0
CLKX2 period 244 ns, 122
ns or 61 ns.
C
C
C
Test Conditions
L
L
L
= 50 pF
= 50 pF
= 50 pF
t
ENAH
Test Conditions
V
V
V
TT
TT
TT