IDT88K8483 Integrated Device Technology, IDT88K8483 Datasheet - Page 90

• Manufacturer Part Number: IDT88K8483
• Description: Spi-4 Exchange Document Issue 1.0
• Manufacturer: Integrated Device Technology

Direct Registers Description
Miscellaneous Registers
Global Software Reset Register
Microprocessor Registers
Microprocessor Mailbox Input FIFO Data Register
Microprocessor Mailbox Input FIFO Length Register
RST
Data
Length
IDT IDT88K8483
Field
Field
Field
Note: (1) All direct registers are 8 bits wide.
Note: Clocks generated by the IDT88K8483 are not affected by a software reset.
(2) Unused bits are reserved bits.
(3) A READ to unused/reserved bits returns 0 while a WRITE is ignored.
R/W
R/W
R/W
Read /
Read /
Read /
Write
Write
Write
Table 21 Microprocessor Mailbox Input FIFO Length Register
Table 20 Microprocessor Mailbox Input FIFO Data Register
0:0
0:0 - 0:7
0:0 - 0:5
Table 19
Bits
Bits
Bits
Global Software Reset Register (Register Offset=0x22)
1
8
6
Length
Length
Length
0
0
0
Reset
Reset
Reset
State
State
State
90 of 162
This field resets the IDT88K8483. Reset automatically runs initialization on both
software and hardware.
Read 0: Initial state after reset.
Write 1: Reset the chip.
Data is written/downloaded to this field, which is a 32 byte IFIFO, by the host CPU
and read by the chip.
This field indicates the number of data bytes that is written to the “data” field in
Microprocessor Mailbox Input FIFO Data Register (p. 90)
(Register Offset=0x10)
(Register Offset=0x11)
Description
Description
Description
by the host CPU.
October 20, 2006