IDT88K8483 Integrated Device Technology, IDT88K8483 Datasheet - Page 152

• Manufacturer Part Number: IDT88K8483
• Description: Spi-4 Exchange Document Issue 1.0
• Manufacturer: Integrated Device Technology

IDT IDT88K8483
MCU Interface - Motorola mode - non multiplexed bus (MPM=0). Write Cycle.
Access p.155
Internal master clock (MCLK) frequency
(defined by the main clock generator)
Write cycle time
Valid DSB width
Delay from DSB to valid write signal
R/WB to DSB hold time
Delay from DSB to Valid Address
Address to DSB hold time
Delay from DSB to valid write data
Write data to DSB hold time
Recovery time from write cycle
MCU Interface - Intel mode - non multiplexed bus (MPM=1). Read Cycle.
p.156
Internal master clock (MCLK) frequency
(defined by main clock generator)
Read cycle time
Valid RDB width
Delay from RDB to Valid Address
Address to RDB hold time
RDB to valid read data propagation delay
Delay from read data active to High Z
Recovery time from read cycle
MCU Interface - Intel mode - non multiplexed bus (MPM=1). Write Cycle.
p.156
Internal master clock (MCLK) period (defined
by clock_generator)
Write cycle time
Valid WRB width
Delay from WRB to Valid Address
Address to WRB hold time
Delay from WRB to valid write data
Write data to WRB hold time
Recovery time from write cycle
Serial Peripheral Interface.
.
.
Parameter
.
Figure 53 Serial Peripheral Interface p.158
Symbol
Table 168 AC Characteristics (Part 3 of 4)
tRecovery
tRecovery
tRecovery
tWRW
tRWV
tRWH
tDHW
tRDW
tDHW
tPRD
tDAZ
tWC
tDW
tWC
tAV
tAH
tDV
tRC
tAV
tAH
tAV
tAH
tDV
F
F
T
152 of 162
Figure 50 MCU Interface - Intel Mode - Read Access
Figure 51 MCU Interface - Intel Mode - Write Access
Conditions
Figure 49 MCU Interface - Motorola Mode - Write
.
tDW+tRe-
tRecovery
tWRW+tR
ecovery
tRDW+
covery
Min
tPRD
124
tAH
124
124
tAH
6T
6T
4T
4T
6T
4T
5
5
5
Typ
2Tmax-2
2Tmax-2
2Tmax-2
2Tmax-2
Max
6Tmax
200
tAV
200
200
tAV
10
October 20, 2006
1
Unit
MHz
MHz
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns