IDT88K8483 Integrated Device Technology, IDT88K8483 Datasheet - Page 108

• Manufacturer Part Number: IDT88K8483
• Description: Spi-4 Exchange Document Issue 1.0
• Manufacturer: Integrated Device Technology

SPI-4 Ingress Calendar 1 Configuration Register
SPI-4 Ingress Status Register
I_CAL_M
I_CAL_LEN
Note:
1
2
the SPI-4 Ingress Calendar 1 Table (p. 105)
3
I_SYNCV
I_DSK_OOR
DCLK_AV
LVDS_STA
IDT IDT88K8483
If the I_CSW_EN bit in
The calendar length CALENDAR_M must be at least as large as the number of active SPI-4 ingress LPs. CALENDAR_M must match the number of entries in
CALENDAR_LEN and CALENDAR_M are described in the OIF SPI-4 implementation agreement (OIF-SPI-4-02.1).
Field
Field
calendar sequence is repeated before a DIP2 parity,’1 1’ framing word and calendar selection word are inserted.
Table 61
SPI4 Ingress Calendar Switch Control Register (p. 109)
R/W
R/W
R
R
R
R
SPI-4 Ingress Calendar 1 Configuration Register (Block base=0x0300, Register Offset=0x04)
Read /
Read /
Write
Write
Table 62
0:0-0:7
1:0-1:6
0:1
0:2
0:3
0:0
SPI-4 Ingress Status Register (Block base=0x0300, Register Offset=0x05)
Bits
Bits
8
7
1
1
1
1
Length
Length
0x01
0x7
0
0
0
X
Reset
Reset
State
State
108 of 162
The I_CAL_M value programmed defines the number of times the calendar 1
sequence is repeated before a DIP-2 parity and “1 1” framing words are inserted
The actual CALENDAR_M
into the I_CAL_M field.
Indicates the length of the ingress calendar 1
CALENDAR_LEN
In LVTTL mode, the I_CAL_LEN can be programmed with any value.
In LVDS mode, the I_CAL_LEN should be programmed with 4n-1, where n is an
integer.
Describes the synchronization state of the SPI-4 ingress data path. Refer to Figure
16 SPI-4 Ingress State Machine p.44 for an illustration of out of sync and in sync
state.
0:SPI-4 ingress data path is out of synchronization
1:SPI-4 ingress data path is in synchronization
Indicates the state of the de-skew block in the ingress datapath.Refer to Figure 15
SPI-4 Ingress Block Diagram p.43 for de-skew overview.
0: SPI-4 ingress data path de-skew is within range.
1: SPI-4 ingress data path de-skew is out of range.
Describes the availability state of the SPI-4 ingress data clock.
0:SPI-4 ingress data clock is not available.
1:SPI-4 ingress data clock is available.
The SPI-4 ingress status channel mode (LVDS/LVTTL) is configured by LVDSSTA
pin and this pin’s level is indicated in the LVDS_STA field.
0:LVTTL mode.
1:LVDS mode.
is set to 1,then the I_CAL_M value defines the number of times the
3
is I_CAL_LEN+1.
3
value used is one more than the value programmed
Description
Description
2
. The actual calendar length
October 20, 2006
1
.