IDT88K8483 Integrated Device Technology, IDT88K8483 Datasheet - Page 146

• Manufacturer Part Number: IDT88K8483
• Description: Spi-4 Exchange Document Issue 1.0
• Manufacturer: Integrated Device Technology

GPIO Level Register
GPIO Link Table
Version Number Register
Software Version Register
ADDRESS
BIT
REFLECT_EN
LEVEL
VER
ID
SW_VER
IDT IDT88K8483
There are 3 registers.
There are 3 registers.
Field
Field
Field
Field
R/W
R/W
R/W
Read /
R/W
R
R
Write
R
Read /
Read /
Read /
Write
Write
Write
Table 161
Table 160
Table 162
Table 163
0:0- 1:7
2:5
2:0- 2:4
0:0-0:7
0:0
0:0-0:7
1:0-1:7
Bits
GPIO Link Table (Block Base=0x8B00, Register Offset=0x16-0x18)
GPIO Level Register (Block Base=0x8B00, Register Offset=0x13-0x15)
Bits
Bits
Bits
Version Number Register (Block Base=0x8B00, Register Offset=0x30)
Version Number Register (Block Base=0x8B00, Register Offset=0x32)
16
5
1
Length
1
8
8
8
Length
Length
Length
0
0
0
Reset
1
State
0x01
0xff
0x01
Reset
Reset
Reset
State
State
State
146 of 162
This field defines the address of the bit to be selected.
This field defines which bit is to be selected at the address defined in the field
ADDRESS.
If this field is enabled, then the LEVEL field in Table 160 reflects the status of the
bit which is selected from the indirect address space.
0: Disable.
1: Enable.
This field controls the logical level on the GPIO pins.It indicates a logical high or a
logical low.
0: Logical low.
1: Logical high.
This field indicates the version of the chip.
This field indicates the chip ID.
This field indicates the software version of the chip.
Description
Description
Description
Description
October 20, 2006