IDT88K8483 Integrated Device Technology, IDT88K8483 Datasheet - Page 130

• Manufacturer Part Number: IDT88K8483
• Description: Spi-4 Exchange Document Issue 1.0
• Manufacturer: Integrated Device Technology

Auxiliary Clock Monitor Status Register)
External Memory Test Control Register
NCLKAV
PCLKAV
Note: Refer to Table 2 “Pin Description” on page 28 for a brief description of the QDR-II clocks.
TEST
IDT IDT88K8483
Field
Field
Table 120 Auxiliary Clock Monitor Status Register
R
R
R/W
Table 121 External Memory Test Control Register (Block Base=0x0A00, Register Offset=0x04)
Read /
Read /
Write
Write
0:0
0:1
0:0
Bits
Bits
1
1
1
Length
Length
3b’000
3b’001
3b’010
3b’011
3b’100
3b’101
3b’110
3b’111
Table 119 External Memory Segmentation
EBC[2:0]
0
0
0
Reset
Reset
State
State
130 of 162
This field monitors the availability of the QDR-II synchronous negative input clock,
CQB.
0: Clock not available.
1: Clock available.
This field monitors the availability of the QDR-II synchronous positive input clock,
CQ.
0: Clock not available.
1: Clock available.
This field triggers the external QDR-II SRAM test.
0: Testing is not triggered.
1: Testing is triggered.
1
4
8
16
32
64
Reserved
Reserved
(Block Base=
Number of FIFO’s
0x0A00
, Register Offset=0x03)
Description
Description
October 20, 2006