IDT88K8483 Integrated Device Technology, IDT88K8483 Datasheet - Page 44

• Manufacturer Part Number: IDT88K8483
• Description: Spi-4 Exchange Document Issue 1.0
• Manufacturer: Integrated Device Technology

content of the control field.
both in IN_SYNCH and OUT_OF_SYNCH state. In IN_SYNCH state, each DIP error generates a DIP-4 error event. This event is captured and
forward to PMON.
mapping is defined by the
event generates. The event and the associated logical port are forwarded to PMON. For each active logical port, data word, SOP, EOP, abort tag and
length are put into associated ingress port buffer. For statistics purpose, the number of transfers and bytes are forwarded to PMON.
SPI-4 Ingress Associated Status Channel
Status Generation
SPI4B_LVDSSTA and SPI4M_LVDSSTA) pin. The level of the LVDSSTA pin is reflected by LVDS_STA field in the
(p.
if ingress data channel is out of sync, it sends training pattern. When the device is in sync, it sends calendar frame or period training. They are
switched at the frame boundary.
then two sets of calendars are used. In this mode, a calendar selection word must be received immediately after the framing word for correct opera-
tion.
tion word is fixed to 01b. If CAL_SEL field in the
1, and the calendar selection word is fixed to 10b.
IDT IDT88K8483
The bus word may be payload data word, payload control word, idle control word or training word. It is classified by the CTL input signal and the
The DIP fields of the control word previous and subsequent payload data or training data are subjected to DIP checking. DIP checking is performed
The logical port information is carried in the payload control word. The following data words are associated with this logical port. The LP to LID
Multiple logical ports can not be mapped to the same LID. The logical port can not remapped in the IN_SYNCH state.
Errors handling scheme:
When a DIP4 error is received in the in IN_SYNCH state, a DIP4 error event is generated and an error tag is added to the packets being received.
When a reserved control word is received, a bus error event is generated and the control word is ignored.
When consecutive payload control words are received, a bus error event is generated and every control word is ignored except the last received.
When payload is received following an idle control word, a bus error event is generated.
When a transfer belonging to an inactive LP is received, an inactive transfer event is generated and the transfer is dropped.
When an unaligned transfer is received, a bus error event is generated.
The device supports both LVTTL and LVDS status channel mode. The status mode (LVDS/LVTTL) is configured by LVDSSTA (SPI4A_LVDSSTA,
108).
When the device is in LVTTL status mode, and if ingress data channel is out of sync, it sends all ‘11’. When the device is in LVDS status mode, and
The device supports one or two sets of calendars. If I_CSW_EN field in the
If CAL_SEL field in the
SPI-4 Ingress LP to LID Mapping Table (p.
SPI4 Ingress Calendar Switch Control Register (p. 109)
OUT_OF_SYNCH
IN_SYNCH
SPI4 Ingress Calendar Switch Control Register (p. 109)
Figure 16 SPI-4 Ingress State Machine
44 of 162
105). Transfers for inactive LPs are flushed, and an ingress inactive logical port
A= A number of consecutive DIP-4 error or reset or interface
disabled or a number of consecutive training pattern received
B= A number of consecutive DIP-4 error free
SPI4 Ingress Calendar Switch Control Register (p. 109)
is cleared to 0, then the device selects calendar 0 and the selec-
is set to 1, then the device selects calendar
SPI-4 Ingress Status Register
October 20, 2006
is set to 1,