RS8953 Conexant Systems, Inc., RS8953 Datasheet - Page 91
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RS8953
Manufacturer Part Number
RS8953
Description
High-bit-rate Digital Subscriber Line (hdsl) Channel unit
Manufacturer
Conexant Systems, Inc.
Datasheet
1.RS8953.pdf
(173 pages)
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RS8953B/8953SPB
HDSL Channel Unit
RMAP[35:0]
Writing any data value to ERR_RST clears the receive CRC Error Counter [CRC_CNT; addr 0x21], the receive
Far End Block Error Counter [FEBE_CNT; addr 0x22], and consequently clears the Counter Overflow
(CRC_OVR) and FEBE_OVR bits [STATUS_2; addr 0x06]. ERR_RST clears the error counters immediately
and must be issued within 6 ms after the respective receive frame interrupt in order to avoid clearing unreported
errors. No other receive errors (CRC_ERR, RFIFO, or RX_STUFF) are affected by ERR_RST.
RSIG_LOC[3:0]
N8953BDSB
0x6B—Receive Payload Map (RMAP_6)
0x67—Error Count Reset (ERR_RST)
0x68—Receive Signaling Location (RSIG_LOC)
—
—
7
7
Receive Payload Map—Six registers hold a 36-bit value to define which of the received HDSL
payload bytes (byte1 through byte36) are placed into the RFIFO. RMAP[0] corresponds to the
first HDSL payload byte (byte1). In T1 mode, F-bits are mapped by enabling one extra byte
after the last payload mapped byte. For example, RMAP[12] controls F-bit mapping to the
RFIFO in 2T1 applications.
Receive Signaling Location—Is applicable only if RSIG_EN [CMD_6; addr 0xF3] enables
LTU grooming in a 2E1 or 3E1 Point-to-Multipoint (P2MP) system. The Receive Signaling
Table [RSIG_TBL; addr 0xF2] compensates for differential frame delays between two or three
remote sites by delaying the current PCM receive frame sync according to the RSIG_LOC
frame delay values for each HDSL channel. RSIG_TBL uses each RSIG_LOC frame delay to
locate frame 0 and to transfer ABCD signaling from the respective channel. RSIG_LOC sets
the number of frame delays, from 1 to 16 frames, therefore RSIG_TBL needs to delay the
current receive PCM frame in order to locate frame 0 of the respective channel. A value of
zero signifies a one frame delay. A one frame delay corresponds to frame 0 occurring in the
first HDSL payload block. RSIG_LOC values are calculated for each channel from the remote
sites measurement of RMSYNC Phase [MSYNC_PHS; addr 0x39]:
—
—
6
6
—
5
5
If RMAP[x] = 0, discard payload byte(x+1)
If RMAP[x] = 1, map payload byte(x+1) to RFIFO
where: FRAME_LEN
RSIG_LOC
RSIG_LOC
truncate []
t(RMP)
—
4
4
Conexant
=
truncate
3
3
---------------------------------- -
FRAME_LEN
RMAP[35:30]
= PCM bits per frame
= Frame delay
= Integer part only
= Remote sites RMSYNC to MSYNC phase
(measured in PCM bits)
t RMP
2
2
RSIG_LOC[3:0]
–
1
4.5 Receive Payload Mapper
1
1
4.0 Registers
0
0
4-23
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