RS8953 Conexant Systems, Inc., RS8953 Datasheet - Page 143

• Manufacturer Part Number: RS8953
• Description: High-bit-rate Digital Subscriber Line (hdsl) Channel unit
• Manufacturer: Conexant Systems, Inc.

RS8953B/8953SPB
HDSL Channel Unit
RST_E_CNT
RST_CRC_CNT
The register is updated once every PCM multiframe. SA5 and A-bit are updated with a value that represents the
majority of identical corresponding bits (5 or more).
E1
E2
A
Sa
Sa
The register is updated twice in a PCM multiframe. It increments each time one of the E-bits is detected
active 0.
N8953BDSB
0x82—PRA Receive Monitor Register 1 (RX _PRA_MON1)
0x83—PRA Receive E bits Counter (RX_PRA_E_CNT)
0x84—PRA Receive CRC4 Errors Counter (RX_PRA_CRC_CNT)
5
6
The counter wraps around at 255. It is cleared/enabled by RESET_E_CNT of RX_PRA_CTRL1 register.
_1, _2, _3, _4
Sa
7
7
7
6
_4
Clears the RX_E counter, as follows:
Clears the RX_CRC counter, as follows:
NOTE:
The value monitored from the E1 location of the data stream, in the HDSL to PCM direction.
E1 is the bit detected in Frame 13.
The value monitored from the E2 location of the data stream, in the HDSL to PCM direction.
E2 is the bit detected in Frame 15.
The value monitored from the A-bit location of the data stream, in the HDSL to PCM
direction.
The value monitored from the Sa
The value monitored from the Sa
PCM direction. Sa
second submultiframe and synchr_en = 0.
Sa
6
6
6
6
_3
The value of this register takes effect starting with the next PCM multiframe
following the write access cycle completion.
Sa
5
5
5
6
_2
6
0 = Counter enabled
1 = Clear the E-receive counter
0 = Counter enabled
1 = Clear the E-receive counter
_1, _2, _3, _4 is updated only if the same Sa6 pattern is detected in the
Sa
RX_PRA_CRC_CNT[7:0]
RX_PRA_E_CNT[7:0]
4
4
4
6
_1
Conexant
5
6
location of the data stream, in the HDSL to PCM direction.
_1, _2, _3, _4 location of the data stream, in the HDSL to
Sa5
3
3
3
A
2
2
2
E2
1
1
1
4.17 PRA Receive Read
4.0 Registers
E1
0
0
0
4-75