RS8953 Conexant Systems, Inc., RS8953 Datasheet - Page 86
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RS8953
Manufacturer Part Number
RS8953
Description
High-bit-rate Digital Subscriber Line (hdsl) Channel unit
Manufacturer
Conexant Systems, Inc.
Datasheet
1.RS8953.pdf
(173 pages)
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4.0 Registers
4.4 HDSL Receive
4.4 HDSL Receive
Table 4-3. HDSL Receive Write Registers
Three identical groups of write-only registers configure the HDSL receivers, and control the mapping of HDSL
payload bytes into the receiver elastic stores (RFIFO). Configuration registers define each HDSL receive
framer’s criteria for loss and recovery of frame alignment by selecting the number of detected SYNC word
errors used to declare loss of sync or needed to acquire sync. Refer to the Framer Synchronization State
Diagram,
requirements.
4-18
0x60
0x61
0x62
0x63
0x64
0x65
0x66
0x67
0x68
0x69
0x70
0x71
CH1
Base Address
Figure
0x80
0x81
0x82
0x83
0x84
0x85
0x86
0x87
0x88
0x89
0x70
0x71
CH2
3-23. Frame alignment criteria are programmable to meet different standard application
0xA0
0xA1
0xA2
0xA3
0xA4
0xA5
0xA6
0xA7
0xA8
0xA9
0xA0
0xA1
CH3
Register Label
RFIFO_RST
SYNC_RST
RSIG_LOC
ERR_RST
HDSL Channel 1
RCMD_1
RCMD_2
RMAP_1
RMAP_2
RMAP_3
RMAP_4
RMAP_5
RMAP_6
(CH1)
0x60
Conexant
Bits
8
8
–
–
6
6
6
6
6
6
–
4
HDSL Channel 2
(CH2)
0x80
Receive Signaling Location
Receive Framer Reset
Name/Description
Receive FIFO Reset
Error Count Reset
Configuration
Configuration
Payload Map
Payload Map
Payload Map
Payload Map
Payload Map
Payload Map
RS8953B/8953SPB
HDSL Channel 3
HDSL Channel Unit
(CH3)
0xA0
N8953BDSB
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