RS8953 Conexant Systems, Inc., RS8953 Datasheet - Page 147

• Manufacturer Part Number: RS8953
• Description: High-bit-rate Digital Subscriber Line (hdsl) Channel unit
• Manufacturer: Conexant Systems, Inc.

RS8953B/8953SPB
HDSL Channel Unit
RST_CRC_CNT
The value of this register is only relevant if its corresponding MODE bit of RX_PRA_CTRL0 is set. A new
written value takes effect starting with the next PCM multiframe following the register write access cycle
completion.
consecutive multiframes.
Sa
Sa
Sa
A_MASK
SA
SA
The value of this register is only relevant if the corresponding MODE bit of RX_PRA_CTRL0 is set. A new
written value takes effect starting with the next PCM multiframe, following the register write access cycle
completion. Each bit of this register is used in the odd frames of the PCM multiframe.
E1
E2
A
N8953BDSB
0xB2—PRA Receive Bits Buffer 1 (RX_BITS_BUFF1)
0xB4—PRA Receive Bits Buffer 0 (RX_BITS_BUFF0)
4
7
8
5
6
An in-band code is reported as detected when the pattern in the Sa
_MASK
_MASK
Sa
—
7
7
6
_4
Sa
Clears the RX_CRC counter, as follows:
NOTE:
The new value to be inserted into the Sa
direction.
The new value to be inserted into the Sa
direction.
The new value to be inserted into the Sa
direction.
Determines if the pattern in the A-bit field must remain constant for 8 consecutive multiframes
for an in-band code to be reported as detected.
Determines if the pattern in the SA
for an in-band code to be reported as detected.
Determines if the pattern in the SA
for an in-band code to be reported as detected.
The new value to be inserted into the E1 location of the data stream, in the HDSL to PCM
direction. E1 is used in Frame 13.
The new value to be inserted into the E2 location of the data stream, in the HDSL to PCM
direction. E2 is used in Frame 15.
The new value to be inserted into the A-bit location of the data stream, in the HDSL to PCM
direction. A-bit is used in all odd frames.
6
Sa
_MASK
6
6
6
_3
The value of this register takes effect starting with the next PCM multiframe,
following the write access cycle completion.
Sa
6
Sa
_MASK
5
5
6
_2
0 = Counter enabled
1 = Clear the E-receive counter
Sa
Sa
6
_MASK
4
4
6
_1
Conexant
5
6
field must remain constant for 8 consecutive multiframes
field must remain constant for 8 consecutive multiframes
4
7
8
location of the data stream, in the HDSL to PCM
location of the data stream, in the HDSL to PCM
location of the data stream, in the HDSL to PCM
Sa5
—
3
3
6
, Sa
5
, AND A fields remain constant for 8
Sa
A
2
2
8
Sa
E2
1
1
4.18 PRA Receive Write
7
4.0 Registers
Sa
E1
0
0
4
4-79