RS8953 Conexant Systems, Inc., RS8953 Datasheet - Page 144

• Manufacturer Part Number: RS8953
• Description: High-bit-rate Digital Subscriber Line (hdsl) Channel unit
• Manufacturer: Conexant Systems, Inc.

4.0 Registers
4.17 PRA Receive Read
The register is updated twice each PCM multiframe. It increments each time a mismatch between the reported
and calculated CRC4 is detected.
This register is updated with a value, only if it was detected identical in the last 8 submultiframes, given the
respective field was not masked in RX_BITS_BUF1.
A
Sa
Sa
CRC error1
CRC error2
Sa
SYNCH_STATE
The 4 bits of this register represent the original number of the relative frame with which synchronization was
achieved. This is relevant only if bit SYNCH_STATE of RX_PRA_MON0 reads 1.
4-76
0x85—PRA Receive In-Band Code (RX_PRA_CODE)
0x86—PRA Receive Monitor Register 0 (RX_PRA_MON0)
0x87—PRA Receive Monitor Register 2 (RX_PRA_MON2)
SYNCH_STATE
5
6
4
The counter wraps around at 255. It is cleared/enabled by RESET_CRC_CNT of RX_PRA_CTRL1 register.
, Sa
_1, _2, _3, _4
Sa
—
7
7
7
7
6
, and Sa
_4
8
The value from the A-bit location of the data stream, in the HDSL to PCM direction.
The value from the Sa
The value from the Sa
direction.
Represents the CRC check result in submultiframe 1.
Represents the CRC check result in submultiframe 2.
Updated with the value that represents the majority of identical respective bits (5 or more).
Represents the status of the multiframe synchronization machine, as follows:
RX_MON2 is readable.
Sa
Sa
—
If SYNCH_STATE reads 1, the offset frame with which synchronization was achieved in
6
6
6
6
_3
8
Sa
Sa
—
5
5
5
6
_2
7
0 = Not synchronized
1 = Synchronized
5
6
location of the data stream, in the HDSL to PCM direction.
_1, _2, _3, _4 location of the data stream, in the HDSL to PCM
Sa
Sa
—
4
4
4
6
_1
4
Conexant
—
—
3
3
3
—
—
RX_PRA_MON2[3:0]
2
2
2
CRC error2
RS8953B/8953SPB
Sa
1
1
1
5
HDSL Channel Unit
N8953BDSB
CRC error1
0
A
0
0