RS8953 Conexant Systems, Inc., RS8953 Datasheet - Page 104

• Manufacturer Part Number: RS8953
• Description: High-bit-rate Digital Subscriber Line (hdsl) Channel unit
• Manufacturer: Conexant Systems, Inc.

4.0 Registers
4.9 DPLL Configuration
DPLL_RESID[15:0]
to operate at standard T1 or E1 clock rates. The following examples show HTU application values for
DPLL_RESID and DPLL_FACTOR:
DPLL_FACTOR[7:0]
4-36
0xD6—DPLL Residual (DPLL_RESID_HI)
0xD7—DPLL Factor (DPLL_FACTOR)
Assuming MCLK operates at eight times the BCLKn frequency (16 times symbol rate) and RCLK is desired
7
7
DPLL Residual—Works in conjunction with DPLL_FACTOR to define the DPLL nominal
free-running frequency in Open Loop Mode or the DPLL initial frequency in Closed Loop
Mode [DPLL_NCO in CMD_5; addr 0xE9]. The DPLL_RESID value is sampled by the
DPLL only after the MPU writes RX_RST [address 0xF1], or after the master HDSL channel’s
receive framer transitions to an IN_SYNC state.
DPLL Factor—Works in conjunction with DPLL_RESID.
6
6
where: round ( )
HTU
2T1
3E1
2E1
5
5
FRACTION = Fraction from INTEGER.FRACTION calculation
INTEGER
DPLL_RESID
DPLL_FACTOR
PLL_MUL
11
11
8
4
4
DPLL_FACTOR[7:0]
DPLL_RESID[15:8]
Conexant
= Round to nearest integer
= Integer from INTEGER.FRACTION calculation
=
round FRACTION
=
PLL_DIV
257 INTEGER
3
3
6
6
6
–
DPLL_FACTOR
2
2
0xEB
0xEF
0xF1
65535
RS8953B/8953SPB
1
1
HDSL Channel Unit
DPLL_RESID
0xD7FF
0x578B
0x4000
N8953BDSB
0
0