RS8953 Conexant Systems, Inc., RS8953 Datasheet - Page 132

• Manufacturer Part Number: RS8953
• Description: High-bit-rate Digital Subscriber Line (hdsl) Channel unit
• Manufacturer: Conexant Systems, Inc.

4.0 Registers
4.14 Common Status
WR[7:0]
ERR_STATUS is a read-clear register in RS8953B. Reading ERR_STATUS forces its contents to 0. Transmit
and receive HDSL channel errors and DPLL errors are reported individually in ERR_STATUS, where they are
indefinitely latched until cleared. The MPU reads ERR_STATUS to determine the cause of a TX_ERR or
RX_ERR interrupt. Each source has independent Interrupt Error Enables (TX_ERR_EN, RX_ERR_EN and
DPLL_ERR_EN), which prevent it from setting the corresponding IRR interrupt. See error interrupt enables in
TCMD_1 [addr 0x06], RCMD_2 [addr 0x61], and CMD_7 [addr 0xF4].
TX1_ERR-TX3_ERR
RX1_ERR-RX3_ERR
DPLL_ERR
4-64
0x3B—Shadow Write (SHADOW_WR)
0x3C—Error Status (ERR_STATUS)
—
7
7
DPLL_ERR
between incoming and outgoing HDSL frames, to adjust its output frame location accordingly
to align with other remote sites, and to communicate the resulting transmit frame offset to the
LTU for grooming purposes. Refer to the Receive Signaling Location Register [RSIG_LOC;
addr 0x68].
Most Recent Write Data—Contains the data latched during the last MPU write cycle to any
location within the RS8953B address space. System diagnostics can read-verify the data
written to validate MPU access over the address/data bus.
Transmit Channel Error—Reported coincident with the TX_ERR interrupt to indicate which
of the three HDSL transmit channels caused the TX_ERR. The MPU reads the respective
channel’s transmit status [STATUS_3; addr 0x07] to determine the specific error.
Receive Channel Error—Reported coincident with the RX_ERR interrupt to indicate which of
the three HDSL receive channels caused the RX_ERR. The MPU reads the respective
channel’s receive status [STATUS_1–STATUS_2; addr 0x05–0x06] to determine the specific
error.
DPLL Phase Detector Error—Reported coincident with the RX_ERR interrupt to indicate
when the DPLL phase detector output reached the maximum or minimum phase error limit.
The NTU in a P2MP application uses both measurements to monitor the phase difference
6
6
RX3_ERR
5
5
0 = No error
1 = Transmit error
0 = No error
1 = Receive error
0 = No error
1 = DPLL error
RX2_ERR
4
4
Conexant
WR[7:0]
RX1_ERR
3
3
TX3_ERR
2
2
TX2_ERR
RS8953B/8953SPB
1
1
HDSL Channel Unit
N8953BDSB
TX1_ERR
0
0