TMP92xy29FG Toshiba, TMP92xy29FG Datasheet - Page 79

• Manufacturer Part Number: TMP92xy29FG
• Manufacturer: Toshiba

Specifications of TMP92xy29FG

• Package: QFP176
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 144
• Architecture: 32-bit CISC
• Usb/spi Channels: 1/1
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: 1
• Adc 10-bit Channel: 6
• Da Converter: -
• Timer 8-bit Channel: 8
• Timer 16-bit Channel: 2
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 98
• Power Supply Voltage(v): 3.0 to 3.6

3.6.2
Note: When using the micro DMA transfer end interrupt, always write “1” to bit 7 of SIMC register.
micro DMA function and HDMA function. This section explains about Micro DMA function.
For the HDMA function, please refer 3.7 DMA controller.
highest priority level for maskable interrupts (Level 6), regardless of the priority level of
the interrupt source.
placed in a stand-by state (IDLE2, IDLE1, STOP) by a HALT instruction, the requirement
of the micro DMA will be ignored (Pending).
micro DMA burst function as below.
Micro DMA processing
Micro DMA processing for interrupt requests set by micro DMA is performed at the
Because the micro DMA function is implemented through the CPU, when the CPU is
Micro DMA supports 8 channels and can be transferred continuously by specifying the
In addition to general-purpose interrupt processing, the TMP92CF29A also includes a
92CF29A-77
TMP92CF29A
2009-06-11