TMP92xy29FG Toshiba, TMP92xy29FG Datasheet - Page 148

• Manufacturer Part Number: TMP92xy29FG
• Manufacturer: Toshiba

Specifications of TMP92xy29FG

• Package: QFP176
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 144
• Architecture: 32-bit CISC
• Usb/spi Channels: 1/1
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: 1
• Adc 10-bit Channel: 6
• Da Converter: -
• Timer 8-bit Channel: 8
• Timer 16-bit Channel: 2
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 98
• Power Supply Voltage(v): 3.0 to 3.6

PC5 setting
PCDR
(008CH)
<PC5F>
<PC2F>
PC2 setting
<PC5C>
<PC2C>
0
1
0
1
bit Symbol
Read/Write
System
Reset State
Hot Reset
State
Function
Input port
Input port
output
EA27
INT2
Note 1: A read-modify-write operation cannot be performed for the registers PCCR, PCFC.
Note 2: When setting PC3-PC0 pins to INT3-INT0 input, set PCDR<PC3D: PC0D> to “0000”(prohibit input), and
0
0
when driving PC3-PC0 pins to “0”, execute HALT instruction. This setting generates INT3-INT0 inside. If don’t
use external interrupt in HALT condition, set like an interrupt don’t generated. (e.g. change port setting)
SPDO output
Don’t setting
Output port
Output port
PC7D
1
1
7
1
−
PC6D
PC7 setting
PC4 setting
PC1 setting
<PC4F>
<PC1F>
<PC7F>
6
1
−
Figure 3.8.25 Register for Port C
<PC4C>
<PC1C>
<PC7C>
0
1
0
1
0
1
Input/Output buffer drive register for standby mode
PC5D
Port C drive register
5
1
−
Input port
Input port
Input port
92CF29A-146
output
setting
EA26
Don’t
INT1
0
0
0
PC4D
4
KO8output
(Open-drain)
1
−
TA0IN input
Output port
Output port
Output port
SPDI input
R/W
1
1
1
PC3D
3
1
−
PC3 setting
<PC0F>
<PC3F>
PC6 setting
<PC6F>
PC0 setting
<PC3C>
<PC6C>
<PC0C>
0
1
PC2D
0
1
0
1
2
1
−
Input port
Input port
Input port
output
EA28
INT3
INT0
0
0
PC1D
0
1
1
−
Don’t setting
TA2IN input
Output port
Output port
Output port
SPCLK
output
TMP92CF29A
PC0D
1
1
1
0
1
−
2009-06-11