TMP92xy29FG Toshiba, TMP92xy29FG Datasheet - Page 140

• Manufacturer Part Number: TMP92xy29FG
• Manufacturer: Toshiba

Specifications of TMP92xy29FG

• Package: QFP176
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 144
• Architecture: 32-bit CISC
• Usb/spi Channels: 1/1
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: 1
• Adc 10-bit Channel: 6
• Da Converter: -
• Timer 8-bit Channel: 8
• Timer 16-bit Channel: 2
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 98
• Power Supply Voltage(v): 3.0 to 3.6

P9DR
(0089H)
P92 setting
<P92F>
<P92C>
0
1
bit Symbol
Read/Write
System
Reset State
Hot Reset
State
Function
Input port,
/SCLK0,SCLK1
CTS
Note 1: A read-modify-write operation cannot be performed for P9CR, P9FC and P9FC2.
Note 2: When setting P96 pin to INT4 input, set P9DR<P96D> to “0” (prohibit input), and when driving P96 pin to “0”,
Don’t setting
Input
0
,
CTS
0
execute HALT instruction. This setting generates INT4 inside. If don’t using external interrupt in HALT
condition, set like an interrupt don’t generated. (e.g. change port setting)
1
P97D
7
1
−
SCLK0,SCLK1
Output port
Output
R/W
1
P96D
6
1
−
Figure 3.8.17 Register for Port 9
P91 setting
Input/Output buffer drive register for standby mode
RXD0,RXD1
Input port/
Port 9 drive register
Input
5
0
92CF29A-138
<P91C>
Output port
4
1
3
P90 setting
<P90F>
<P90C>
0
1
P92D
2
1
−
Input port
setting
Don’t
0
P91D
R/W
1
1
−
TXD0,TXD1
Output port
Output
TMP92CF29A
P90D
1
0
1
−
2009-06-11