TMP92xy29FG Toshiba, TMP92xy29FG Datasheet - Page 315

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TMP92xy29FG

Manufacturer Part Number
TMP92xy29FG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP92xy29FG

Package
QFP176
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
Romless
Rom Combinations
Romless
Ram Combinations
144
Architecture
32-bit CISC
Usb/spi Channels
1/1
Uart/sio Channels
2
I2c/sio Bus Channels
1
(s)dram Controller
1
Adc 10-bit Channel
6
Da Converter
-
Timer 8-bit Channel
8
Timer 16-bit Channel
2
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
Y
Number Of I/o Ports
98
Power Supply Voltage(v)
3.0 to 3.6
TB0RG0H/L-WR
TB0IN0
φT16
φT1
φT4
X: Don't care, −: No change
TB0RUN
TB0RG0H/L
TB0RG1H/L
TB0RUN
TB0FFCR
TB0MOD
PPFC
TB0RUN
TB0RUN<TB0RDE>
The following block diagram illustrates this mode.
The following example shows how to set 16-bit PPG output mode:
Selector
Selector
← X
1
0
1
7
0
*
*
*
*
Figure 3.14.10 Block Diagram of 16-Bit Mode
X
1
6
0
0
0
0
*
*
*
*
16-bit comparator
Register buffer 0
5
X
X
0
1
X
*
*
*
*
TB0RG0H/L
4
X
X
0
0
X
*
*
*
*
(** = 01, 10, 11)
3
1
0
*
*
*
*
2
0
1
1
1
*
*
*
*
92CF29A-313
16-bit up counter
Internal data bus
X
X
X
1
1
*
*
*
*
*
Match
X
0
0
0
0
1
*
*
*
*
*
UC10
16-bit comparator
Disable the TB0RG0H/L double buffer and stop TMRB0.
Set the duty ratio
(16 bit)
Set the frequency
(16 bit)
Enable the TB0RG0H/L double buffer.
(The duty and frequency are changed on an INTTB01
interrupt.)
Set the mode to invert TB0FF0 at the match with
TB0RG0H/L/TB0RG1H/L. Set TB0FF0 to 0.
Select the internal clock as the input clock and disable
the capture function.
Set PP6 to function as TB0OUT0
Start TMRB0.
TB0RG1H/L
TB0RUN<TB0RUN> TB0OUT0 (PPG output)
Clear
(TB0FF0)
F/F
TMP92CF29A
2009-06-11

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