TMP92xy29FG Toshiba, TMP92xy29FG Datasheet - Page 296

• Manufacturer Part Number: TMP92xy29FG
• Manufacturer: Toshiba

Specifications of TMP92xy29FG

• Package: QFP176
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 144
• Architecture: 32-bit CISC
• Usb/spi Channels: 1/1
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: 1
• Adc 10-bit Channel: 6
• Da Converter: -
• Timer 8-bit Channel: 8
• Timer 16-bit Channel: 2
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 98
• Power Supply Voltage(v): 3.0 to 3.6

Example:
X: Don't care, −: No change
TA01RUN
TA01MOD
TA0REG
TA1REG
TA1FFCR
PM
PMFC
TA01RUN
Calculate the value which should be set in the timer register.
To obtain a frequency of 31.25 kHz, the pulse cycle t should be: t = 1/31.25kHz = 32 μs
φT1 = 0.16 μs (at 50 MHz);
Therefore set TA1REG to 200 (C8H)
The duty is to be set to 1/4: t × 1/4 = 32 μs × 1/4 = 8 μs
Therefore, set TA0REG = 50 = 32H.
To generate 1/4 duty 31.25 kHz pulses (at f
32 μs ÷ 0.16 μs = 200
8 μs ÷ 0.16 μs = 50
* Clock state
← −
← 1
← 0
← 1
← X
← −
← −
← 1
7
32 μs
6
X
0
0
1
X
X
X
X
5
X
X
0
0
X
X
X
X
4
X
X
0
0
X
X
X
X
Clcok gear :
Prescaler of clock gear : 1/2
3
−
X
1
1
0
X
X
−
2
−
X
0
0
1
−
−
1
92CF29A-294
1
0
0
1
0
1
0
1
1
0
0
1
0
0
X
X
X
1
SYS
1/1
= 50 MHz)
Stop TMRA0 and TMRA1 and clear it to “0”.
Set the 8-bit PPG mode, and select φT1 as input clock.
Write 32H.
Write C8H.
Set TA1FF, enabling both inversion and the double buffer.
Writing 10 provides negative logic pulse.
Set PM1 as the TA1OUT pin.
Start TMRA0 and TMRA1 counting.
TMP92CF29A
2009-06-11