TMP92xy29FG Toshiba, TMP92xy29FG Datasheet - Page 149

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TMP92xy29FG

Manufacturer Part Number
TMP92xy29FG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP92xy29FG

Package
QFP176
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
Romless
Rom Combinations
Romless
Ram Combinations
144
Architecture
32-bit CISC
Usb/spi Channels
1/1
Uart/sio Channels
2
I2c/sio Bus Channels
1
(s)dram Controller
1
Adc 10-bit Channel
6
Da Converter
-
Timer 8-bit Channel
8
Timer 16-bit Channel
2
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
Y
Number Of I/o Ports
98
Power Supply Voltage(v)
3.0 to 3.6
3.8.10
input or output. Resetting sets PF0 to PF2 to be input ports. It also sets all bits of the
output latch register to “1”. In addition to functioning as general-purpose I/O port pins,
PF0 to PF2 can also function as the output for I
a “1” to the corresponding bit of the Port F Function Register (PFFC).
general-purpose output port, PF7 can also function as the SDCLK output. Resetting sets
PF7 to be an SDCLK output port.
(1) Port F0 (I2S0CKO), Port F1 (I2S0DO), Port F2 (I2S0WS)
Port F (PF0 to PF2, PF7)
Ports F0 to F2 are 3-bit general-purpose I/O ports. Each bit can be set individually for
Port F7 is a 1-bit general-purpose output port. In addition to functioning as
pin is detailed below.
Ports F0 to F2 are general-purpose I/O port. They also function as either I
PF0
PF1
PF2
(Word-select output)
92CF29A-147
(I2S0Module)
(Clock output)
(Data output)
I
I2S0CKO
2
I2S0WS
I2S0DO
Smode
2
S0. A pin can be enabled for I/O by writing
TMP92CF29A
2009-06-11
2
S. Each

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