TMP92xy29FG Toshiba, TMP92xy29FG Datasheet - Page 26

• Manufacturer Part Number: TMP92xy29FG
• Manufacturer: Toshiba

Specifications of TMP92xy29FG

• Package: QFP176
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 144
• Architecture: 32-bit CISC
• Usb/spi Channels: 1/1
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: 1
• Adc 10-bit Channel: 6
• Da Converter: -
• Timer 8-bit Channel: 8
• Timer 16-bit Channel: 2
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 98
• Power Supply Voltage(v): 3.0 to 3.6

RAM
ROM
Package
Pin count
DSU
I2S
8-bit timer
SIO
16-bit timer
LCDC
General-
purpose port
pins
Power supply
pins
Dummy
TOTAL
Other Specification Changes
The number of SIO channels is
increased to two channels.
The X1D4 pin is added.
The LCDC supports
monochrome TFT panels.
SPI output can be made from
either of two pins.
TEST
Item
288 KB
8 KB (BOOT)
FBGA228-P-1515-0.80A
228
Supports
2 channels
8 channels
1 channel
2 channels
TFT 16M colors
P84/ CSZB
P85/ CSZC
PV0
PV1
PV2
PV3
PV4
PX7
PW0 to PW7
DVCC3A 12
DVCC3B 1
DVCC1A 5
DVCC1B 1
DVCC1C 1
DVCC1S 1
DVSSCOM 12
4 pins
Not supports
TMP92CF29A. For details, refer to the chapter on each functional block.
Table 3.3.1 summarizes the differences between the TMP92CZ26A and the
Table 3.3.1 Differences between the TMP92CZ26A and the TMP92CF29A
TMP92CZ26A
In the TMPCZ26A/CF26A only one SIO channel is available, whereas the TMP92CF29A has two
SIO channels. However, the added SIO function cannot be debugged with development tools.
The X1D4 pin can be used to output x1, x1/2, x1/4 or x1/8 of the external clock according to the
CPU state (in NORMAL, IDLE1 and IDLE2 modes). However, this function cannot be debugged
with development tools.
The LCDC of the TMP92CF29A supports monochrome TFT mode. However, this new function
cannot be debugged with development tools.
As in the case of the TMP92CZ26A/CF26A, the TMP92CF29A has only one SPI channel, but the
output pin can be selected from two pins. However, this new function cannot be debugged with
development tools.
144 KB
8 KB (BOOT)
LQFP176-P-2020-0.40F
176
Not supports
1 channel
8 channels
2 channels
2 channels
TFT 64k colors
Deleted
Deleted
Deleted
Deleted
Deleted
Deleted
Deleted
Deleted
Deleted
DVCC3A 8
DVCC3B 0
DVCC1A 4
DVCC1B 1
DVCC1C 1
DVCC1S 1
DVSSCOM 8
None
Adds
TMP92CF29A
92CF29A-24
2 pins deleted: PP1(TA3OUT), PP2 (T5OUT)
Development tools using the TMP92CZ26 are
offered.
10 pins are deleted: DBGE , PZ0 to PZ7, PU7
Channel 1 are deleted
3 pins are deleted: PF3 (I2S1CKO, X1D4),
PF4 (I2S1DO), PF5 (I2S1WS)
The newly added channel cannot be debugged with
development tools.
1 pin is deleted: PP7(TB1OUT0)
LD bus lines are reduced from 24 lines to 16 lines
7 pins are deleted: PU0(LD16) to PU7(LD23)
(Deletion of PU7 is already counted with the DSU.)
The LCDC cannot be used in 32-bit bus mode.
15 port pins are deleted
10 power supply pins deleted
4 dummy pins are deleted
The TEST pin is added
228-pin BGA → 176-pin QFP
(A total of 52 pins are deleted)
Note
TMP92CF29A
2009-06-11
-10
-3
-2
-1
-7
-16
-10
-4
+1
-52