TMP92xy29FG Toshiba, TMP92xy29FG Datasheet - Page 154

• Manufacturer Part Number: TMP92xy29FG
• Manufacturer: Toshiba

Specifications of TMP92xy29FG

• Package: QFP176
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 144
• Architecture: 32-bit CISC
• Usb/spi Channels: 1/1
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: 1
• Adc 10-bit Channel: 6
• Da Converter: -
• Timer 8-bit Channel: 8
• Timer 16-bit Channel: 2
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 98
• Power Supply Voltage(v): 3.0 to 3.6

3.8.12
they output “1”. PJ5 to PJ6 are 2-bit input/output port. In addition to functioning as a port,
Port J also functions as output pins for SDRAM (
SDLUDQM, and SDCKE), SRAM (
and NDCLE).
automatically according to the setting of the memory controller.
Port J (PJ0 to PJ7)
PJ0 to PJ4 and PJ7 are 6-bit output port. Resetting sets the output latch PJ to “1”, and
The above settings are made using the function register PJFC.
However, either SDRAM or SRAM output signal for PJ0 to PJ2 are selected
Reset
(on bit basis)
Output latch
PJFC write
Function
control
PJ write
PJ read
Figure 3.8.31 Port J0 to J4 and J7
92CF29A-152
SRLLB , SRLUB , SRWR
SDRAS , SDCAS , SDWE , SDLLDQM, SDLUDQM, SDCKE
Selector
S
SRWR
,
SRLLB
and
SDRAS
SRLUB
PJ0 (
PJ1 (
PJ2 (
PJ3 (SDLLDQM)
PJ4 (SDLUDQM)
PJ 7(SDCKE)
SDRAS
SDCAS
SDWE
,
SDCAS
) and NAND-Flash(NDALE
,
,
,
SRWR
SRLLB
SRLUB
,
)
SDWE
)
)
TMP92CF29A
, SDLLDQM,
2009-06-11