SAM9XE512 Atmel Corporation, SAM9XE512 Datasheet - Page 99
SAM9XE512
Manufacturer Part Number
SAM9XE512
Description
Manufacturer
Atmel Corporation
Datasheets
1.SAM9260.pdf
(290 pages)
2.SAM9261.pdf
(248 pages)
3.SAM9XE128.pdf
(860 pages)
4.SAM9XE128.pdf
(48 pages)
Specifications of SAM9XE512
Flash (kbytes)
512 Kbytes
Pin Count
217
Max. Operating Frequency
180 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
96
Ext Interrupts
96
Usb Transceiver
3
Usb Speed
Full Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
2
Uart
6
Ssc
1
Ethernet
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
Yes
Adc Channels
4
Adc Resolution (bits)
10
Adc Speed (ksps)
312
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
32
Self Program Memory
NO
External Bus Interface
1
Dram Memory
sdram
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.65 to 1.95
Fpu
No
Mpu / Mmu
No / Yes
Timers
6
Output Compare Channels
6
Input Capture Channels
6
32khz Rtc
Yes
Calibrated Rc Oscillator
No
- SAM9260 PDF datasheet
- SAM9261 PDF datasheet #2
- SAM9XE128 PDF datasheet #3
- SAM9XE128 PDF datasheet #4
- Current page: 99 of 860
- Download datasheet (13Mb)
14.3.4.6
14.3.4.7
6254C–ATARM–22-Jan-10
Flash Security Bit Command
Memory Write Command
GP NVM bits can be read using Get GPNVM Bit command (GGPB). When a bit set in the Bit
Mask is returned, then the corresponding GPNVM bit is set.
Table 14-25. Get General-purpose NVM Bit Command
Security bits can be set using Set Security Bit command (SSE). Once the security bit is active,
the Fast Flash programming is disabled. No other command can be run. Only an event on the
Erase pin can erase the security bit once the contents of the Flash have been erased.
Table 14-26. Set Security Bit Command
Once the security bit is set, it is not possible to access FFPI. The only way to erase the security
bit is to erase the Flash.
In order to erase the Flash, the user must perform the following:
Then it is possible to return to FFPI mode and check that Flash is erased.
This command is used to perform a write access to any memory location.
The Memory Write command (WRAM) is optimized for consecutive writes. An internal address
buffer is automatically increased.
Table 14-27. Write Command
Read/Write
Write
Read
Read/Write
Write
Read/Write
Write
Write
Write
Write
Write
Write
• Power-off the chip
• Power-on the chip with TST = 0
• Assert Erase during a period of more than 220 ms
• Power-off the chip
DR Data
GGPB
Bit Mask
DR Data
SSE
DR Data
(Number of Words to Write) << 16 | (WRAM)
Address
Memory [address]
Memory [address+4]
Memory [address+8]
Memory [address+(Number of Words to Write - 1)* 4]
AT91SAM9XE128/256/512 Preliminary
99
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