SAM9XE512 Atmel Corporation, SAM9XE512 Datasheet - Page 498
SAM9XE512
Manufacturer Part Number
SAM9XE512
Description
Manufacturer
Atmel Corporation
Datasheets
1.SAM9260.pdf
(290 pages)
2.SAM9261.pdf
(248 pages)
3.SAM9XE128.pdf
(860 pages)
4.SAM9XE128.pdf
(48 pages)
Specifications of SAM9XE512
Flash (kbytes)
512 Kbytes
Pin Count
217
Max. Operating Frequency
180 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
96
Ext Interrupts
96
Usb Transceiver
3
Usb Speed
Full Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
2
Uart
6
Ssc
1
Ethernet
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
Yes
Adc Channels
4
Adc Resolution (bits)
10
Adc Speed (ksps)
312
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
32
Self Program Memory
NO
External Bus Interface
1
Dram Memory
sdram
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.65 to 1.95
Fpu
No
Mpu / Mmu
No / Yes
Timers
6
Output Compare Channels
6
Input Capture Channels
6
32khz Rtc
Yes
Calibrated Rc Oscillator
No
- SAM9260 PDF datasheet
- SAM9261 PDF datasheet #2
- SAM9XE128 PDF datasheet #3
- SAM9XE128 PDF datasheet #4
- Current page: 498 of 860
- Download datasheet (13Mb)
34.6.1.2
Table 34-2.
34.6.1.3
6254C–ATARM–22-Jan-10
Source Clock
12 000 000
12 288 000
14 318 180
14 745 600
18 432 000
24 000 000
24 576 000
25 000 000
32 000 000
32 768 000
33 000 000
40 000 000
50 000 000
3 686 400
4 915 200
5 000 000
7 372 800
8 000 000
MHz
Baud Rate Calculation Example
Fractional Baud Rate in Asynchronous Mode
Baud Rate Example (OVER = 0)
Expected Baud
Table 34-2
clock frequencies. This table also shows the actual resulting baud rate and the error.
The baud rate is calculated with the following formula:
The baud rate error is calculated with the following formula. It is not recommended to work with
an error higher than 5%.
The Baud Rate generator previously defined is subject to the following limitation: the output fre-
quency changes by only integer multiples of the reference frequency. An approach to this
problem is to integrate a fractional N clock generator that has a high resolution. The generator
architecture is modified to obtain Baud Rate changes by a fraction of the reference source clock.
This fractional part is programmed with the FP field in the Baud Rate Generator Register
(US_BRGR). If FP is not 0, the fractional part is activated. The resolution is one eighth of the
38 400
38 400
38 400
38 400
38 400
38 400
38 400
38 400
38 400
38 400
38 400
38 400
38 400
38 400
38 400
38 400
38 400
38 400
Rate
Bit/s
BaudRate
Error
=
shows calculations of CD to obtain a baud rate at 38400 bauds for different source
1
–
Calculation Result
⎛
⎝
=
ExpectedBaudRate
-------------------------------------------------------- -
ActualBaudRate
MCK
12.00
13.02
19.53
20.00
23.30
24.00
30.00
39.06
40.00
40.69
52.08
53.33
53.71
65.10
81.38
AT91SAM9XE128/256/512 Preliminary
6.00
8.00
8.14
⁄
CD
×
16
⎞
⎠
CD
12
13
20
20
23
24
30
39
40
40
52
53
54
65
81
6
8
8
Actual Baud Rate
38 400.00
38 400.00
39 062.50
38 400.00
38 461.54
37 500.00
38 400.00
38 908.10
38 400.00
38 400.00
38 461.54
38 400.00
38 109.76
38 461.54
38 641.51
38 194.44
38 461.54
38 580.25
Bit/s
0.00%
0.00%
1.70%
0.00%
0.16%
2.40%
0.00%
1.31%
0.00%
0.00%
0.16%
0.00%
0.76%
0.16%
0.63%
0.54%
0.16%
0.47%
Error
498
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