SAM9XE512 Atmel Corporation, SAM9XE512 Datasheet - Page 812
SAM9XE512
Manufacturer Part Number
SAM9XE512
Description
Manufacturer
Atmel Corporation
Datasheets
1.SAM9260.pdf
(290 pages)
2.SAM9261.pdf
(248 pages)
3.SAM9XE128.pdf
(860 pages)
4.SAM9XE128.pdf
(48 pages)
Specifications of SAM9XE512
Flash (kbytes)
512 Kbytes
Pin Count
217
Max. Operating Frequency
180 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
96
Ext Interrupts
96
Usb Transceiver
3
Usb Speed
Full Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
2
Uart
6
Ssc
1
Ethernet
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
Yes
Adc Channels
4
Adc Resolution (bits)
10
Adc Speed (ksps)
312
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
32
Self Program Memory
NO
External Bus Interface
1
Dram Memory
sdram
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.65 to 1.95
Fpu
No
Mpu / Mmu
No / Yes
Timers
6
Output Compare Channels
6
Input Capture Channels
6
32khz Rtc
Yes
Calibrated Rc Oscillator
No
- SAM9260 PDF datasheet
- SAM9261 PDF datasheet #2
- SAM9XE128 PDF datasheet #3
- SAM9XE128 PDF datasheet #4
- Current page: 812 of 860
- Download datasheet (13Mb)
43.8
43.9
Table 43-24. Power-On-Reset Characteristics
43.10 Power-down Sequence
812
Symbol
V
V
T
RES
th+
th-
Core Power Supply POR Characteristics
Power-up Sequence
AT91SAM9XE128/256/512 Preliminary
Parameter
Threshold Voltage Rising
Threshold Voltage Falling
Reset Time
The board design must comply with the power-up guidelines below to guarantee reliable opera-
tion of the device. Any deviation from these sequences may prevent the device from booting.
VDDCORE and VDDBU are controlled by internal POR (Power-On-Reset) to guarantee that
these power sources reach their target values prior to the release of POR.
To ensure a working system, VDDIOP0, VDDIOP1, and VDDIOM should be established to
power external memories and I/Os before the first acces. This can be achieved if VDDIOP0,
VDDIOP1, and VDDIOM are powered before VDDCORE.
To ensure external memories and I/Os are powered until the last access, switch off VDDIOM,
VDDIOP0 and VDDIOP1 power supplies after or at the same time as switching off VDDCORE.
No power-up or power-down restrictions apply to VDDBU, VDDPLL and VDDANA.
Conditions
Minimum Slope of +2.0V/200ms
1.35
1.25
Min
100
1.50
1.30
Typ
200
6254C–ATARM–22-Jan-10
1.59
Max
1.40
350
Units
µs
V
V
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