SAM9XE512 Atmel Corporation, SAM9XE512 Datasheet - Page 163

• Manufacturer Part Number: SAM9XE512
• Manufacturer: Atmel Corporation

Specifications of SAM9XE512

• Flash (kbytes): 512 Kbytes
• Pin Count: 217
• Max. Operating Frequency: 180 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 96
• Ext Interrupts: 96
• Usb Transceiver: 3
• Usb Speed: Full Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 2
• Uart: 6
• Ssc: 1
• Ethernet: 1
• Sd / Emmc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: Yes
• Adc Channels: 4
• Adc Resolution (bits): 10
• Adc Speed (ksps): 312
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 32
• Self Program Memory: NO
• External Bus Interface: 1
• Dram Memory: sdram
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.65 to 1.95
• Fpu: No
• Mpu / Mmu: No / Yes
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

21.5
Table 21-1.
6254C–ATARM–22-Jan-10
0x00A8 - 0x00FC
0x0018 - 0x003C
0x0054 - 0x007C
0x0104 - 0x010C
0x000C
0x004C
0x008C
0x009C
0x00A0
0x0000
0x0004
0x0008
0x0010
0x0014
0x0040
0x0044
0x0048
0x0050
0x0080
0x0084
0x0088
0x0090
0x0094
0x0098
0x0100
Offset
Bus Matrix (MATRIX) User Interface
Register Mapping
Register
Master Configuration Register 0
Master Configuration Register 1
Master Configuration Register 2
Master Configuration Register 3
Master Configuration Register 4
Master Configuration Register 5
Reserved
Slave Configuration Register 0
Slave Configuration Register 1
Slave Configuration Register 2
Slave Configuration Register 3
Slave Configuration Register 4
Reserved
Priority Register A for Slave 0
Reserved
Priority Register A for Slave 1
Reserved
Priority Register A for Slave 2
Reserved
Priority Register A for Slave 3
Reserved
Priority Register A for Slave 4
Reserved
Master Remap Control Register
Reserved
AT91SAM9XE128/256/512 Preliminary
MATRIX_MCFG0
MATRIX_MCFG1
MATRIX_MCFG2
MATRIX_MCFG3
MATRIX_MCFG4
MATRIX_MCFG5
MATRIX_SCFG0
MATRIX_SCFG1
MATRIX_SCFG2
MATRIX_SCFG3
MATRIX_SCFG4
MATRIX_PRAS0
MATRIX_PRAS1
MATRIX_PRAS2
MATRIX_PRAS3
MATRIX_PRAS4
MATRIX_MRCR
Name
–
–
–
–
–
–
–
–
Read-write
Read-write
Read-write
Read-write
Read-write
Read-write
Read-write
Read-write
Read-write
Read-write
Read-write
Read-write
Read-write
Read-write
Read-write
Read-write
Read-write
Access
–
–
–
–
–
–
–
–
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00010010
0x00050010
0x00000010
0x00000010
0x00000010
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
Reset
–
–
–
–
–
–
–
–
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