SAM9G45 Atmel Corporation, SAM9G45 Datasheet - Page 49

• Manufacturer Part Number: SAM9G45
• Manufacturer: Atmel Corporation

Specifications of SAM9G45

• Flash (kbytes): 0 Kbytes
• Pin Count: 324
• Max. Operating Frequency: 400 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 160
• Ext Interrupts: 160
• Usb Transceiver: 3
• Usb Speed: Hi-Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 2
• Uart: 5
• Lin: 4
• Ssc: 2
• Ethernet: 1
• Sd / Emmc: 2
• Graphic Lcd: Yes
• Video Decoder: No
• Camera Interface: Yes
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 440
• Resistive Touch Screen: Yes
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 64
• Self Program Memory: NO
• External Bus Interface: 2
• Dram Memory: DDR2/LPDDR, SDRAM/LPSDR
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 0.9 to 1.1
• Fpu: No
• Mpu / Mmu: No/Yes
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

ARM DDI0198D
Reading from CP15 c7 is Unpredictable, with the exception of the two test and clean
operations (see Table 2-18 on page 2-22 and Test and clean operations on page 2-24).
You can use the following instruction to write to c7:
The cache functions, and a description of each function, provided by this register are
listed in Table 2-17.
Function
Invalidate cache
Invalidate single entry using
either index or modified virtual
address
Clean single data entry using
either index or modified virtual
address
Clean and invalidate single
data entry using either index or
modified virtual address
Test and clean DCache
Test, clean, and invalidate
DCache
Copyright © 2001-2003 ARM Limited. All rights reserved.
Description
Invalidates all cache data, including any dirty data.
Invalidates a single cache line, discarding any dirty data.
Writes the specified DCache line to main memory if the
line is marked valid and dirty. The line is marked as not
dirty. The valid bit is unchanged.
Writes the specified DCache line to main memory if the
line is marked valid and dirty. The line is marked not valid.
Tests a number of cache lines, and cleans one of them if any
are dirty. Returns the overall dirty state of the cache in bit
30. See Test and clean operations on page 2-24.
As for test and clean, except that when the entire cache has
been tested and cleaned, it is invalidated. See Test and clean
operations on page 2-24.
Table 2-17 Function descriptions register c7
Programmer’s Model
2-21