SAM9G45 Atmel Corporation, SAM9G45 Datasheet - Page 138

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SAM9G45

Manufacturer Part Number
SAM9G45
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM9G45

Flash (kbytes)
0 Kbytes
Pin Count
324
Max. Operating Frequency
400 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
160
Ext Interrupts
160
Usb Transceiver
3
Usb Speed
Hi-Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
2
Uart
5
Lin
4
Ssc
2
Ethernet
1
Sd / Emmc
2
Graphic Lcd
Yes
Video Decoder
No
Camera Interface
Yes
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
440
Resistive Touch Screen
Yes
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
64
Self Program Memory
NO
External Bus Interface
2
Dram Memory
DDR2/LPDDR, SDRAM/LPSDR
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
0.9 to 1.1
Fpu
No
Mpu / Mmu
No/Yes
Timers
6
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
Tightly-Coupled Memory Interface
5.7
5-30
TCM write buffer
Each TCM interface has a two word entry write buffer. This is required to de-pipeline
the address and data values produced by the ARM9EJ-S core so that non-speculative
writes can be made to memory with SRAM characteristics peformed without
introducing stall cycles.
The ARM9EJ-S core read requests take priority over writes, and consequently TCM
transactions can be out of order with respect to instruction execution. If a read access
occurs to a location that also has a corresponding entry in the write-buffer, then data is
forwarded from the write-buffer. If it is necessary to ensure that all outstanding writes
have completed on the TCM interface then the CP15 drain write buffer instruction can
be used (
until all oustanding buffered writes (TCM and AHB) have been completed.
To guarantee that the TCM write buffers have been drained and that all outstanding
requests on the TCM interface have completed, a drain write buffer instruction must be
used prior to disabling either of the TCM regions.
Copyright © 2001-2003 ARM Limited. All rights reserved.
). This instruction does not complete execution
ARM DDI0198D

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