SAM9G45 Atmel Corporation, SAM9G45 Datasheet - Page 215

• Manufacturer Part Number: SAM9G45
• Manufacturer: Atmel Corporation

Specifications of SAM9G45

• Flash (kbytes): 0 Kbytes
• Pin Count: 324
• Max. Operating Frequency: 400 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 160
• Ext Interrupts: 160
• Usb Transceiver: 3
• Usb Speed: Hi-Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 2
• Uart: 5
• Lin: 4
• Ssc: 2
• Ethernet: 1
• Sd / Emmc: 2
• Graphic Lcd: Yes
• Video Decoder: No
• Camera Interface: Yes
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 440
• Resistive Touch Screen: Yes
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 64
• Self Program Memory: NO
• External Bus Interface: 2
• Dram Memory: DDR2/LPDDR, SDRAM/LPSDR
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 0.9 to 1.1
• Fpu: No
• Mpu / Mmu: No/Yes
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

ARM DDI0198D
To read an entry from the 2-way main TLB, the entry must first be written using the
above instructions. The entry can then be read using the following instructions:
The data RAM attached to the main MMU is 112 bits wide. The mapping into the data
RAM for main TLB writes for the TAG is shown below and would appear on
MMUxWD[111:0] as shown in Table B-7.
During writes, the data is replicated so that each way receives the same copy of the data.
The exact way that is written and the exact index of the way is specified in the Test and
Debug Address Register.
Figure B-5 on page B-10 shows what happens during a write to the data RAM attached
to the main MMU.
Copyright © 2001-2003 ARM Limited. All rights reserved.
Way
1
0
Table B-7 Main TLB mapping to MMUxWD
MMUxWD
bits
[111:90]
[89:86]
[85:64]
[63:60]
[59:58]
[57]
[56]
[55:34]
[33:30]
[29:8]
[7:4]
[3:2]
[1]
[0]
CP15 Test and Debug Registers
Description
TAG[31:10]
Size of entry
PA[31:10]
Domain select [3:0]
AP[1:0]
Cachable bit
Bufferable bit
TAG[31:10]
Size of entry
PA[31:10]
Domain select [3:0]
AP[1:0]
Cachable bit
Bufferable bit
B-9