SAM9G25 Atmel Corporation, SAM9G25 Datasheet - Page 867

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SAM9G25

Manufacturer Part Number
SAM9G25
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM9G25

Flash (kbytes)
0 Kbytes
Pin Count
247
Max. Operating Frequency
400 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
105
Ext Interrupts
105
Usb Transceiver
3
Usb Speed
Hi-Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
3
Uart
7
Lin
4
Ssc
1
Ethernet
1
Sd / Emmc
2
Graphic Lcd
No
Video Decoder
No
Camera Interface
Yes
Adc Channels
12
Adc Resolution (bits)
10
Adc Speed (ksps)
440
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
32
Self Program Memory
NO
External Bus Interface
1
Dram Memory
DDR2/LPDDR, SDRAM/LPSDR
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
0.9 to 1.1
Fpu
No
Mpu / Mmu
No/Yes
Timers
6
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
39.7.10
11032A–ATARM–27-Jul-11
11032A–ATARM–27-Jul-11
Write Protection Registers
Figure 39-57. Remote Loopback Mode Configuration
To prevent any single software error that may corrupt USART behavior, certain address spaces
can be write-protected by setting the WPEN bit in the USART Write Protect Mode Register
(US_WPMR).
If a write access to the protected registers is detected, then the WPVS flag in the USART Write
Protect Status Register (US_WPSR) is set and the field WPVSRC indicates in which register the
write access has been attempted.
The WPVS flag is reset by writing the USART Write Protect Mode Register (US_WPMR) with
the appropriate access key, WPKEY.
The protected registers are:
“USART Mode Register”
“USART Baud Rate Generator Register”
“USART Receiver Time-out Register”
“USART Transmitter Timeguard Register”
“USART FI DI RATIO Register”
“USART IrDA FILTER Register”
“USART Manchester Configuration Register”
Transmitter
Receiver
1
RXD
TXD
SAM9G25
SAM9G25
867
867

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