SAM9G25 Atmel Corporation, SAM9G25 Datasheet - Page 1107

• Manufacturer Part Number: SAM9G25
• Manufacturer: Atmel Corporation

Specifications of SAM9G25

• Flash (kbytes): 0 Kbytes
• Pin Count: 247
• Max. Operating Frequency: 400 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 105
• Ext Interrupts: 105
• Usb Transceiver: 3
• Usb Speed: Hi-Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 3
• Uart: 7
• Lin: 4
• Ssc: 1
• Ethernet: 1
• Sd / Emmc: 2
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: Yes
• Adc Channels: 12
• Adc Resolution (bits): 10
• Adc Speed (ksps): 440
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 32
• Self Program Memory: NO
• External Bus Interface: 1
• Dram Memory: DDR2/LPDDR, SDRAM/LPSDR
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 0.9 to 1.1
• Fpu: No
• Mpu / Mmu: No/Yes
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

46.14.2.3
Table 46-30. SMC Write Signals - NWE Controlled (WRITE_MODE = 1)
Notes:
11032A–ATARM–27-Jul-11
11032A–ATARM–27-Jul-11
Symbol
SMC
SMC
SMC
SMC
SMC
SMC
SMC
SMC
15
16
17
18
19
20
21
21b
1. hold length = total cycle duration - setup duration - pulse duration. “hold length” is for “ncs wr hold length” or “NWE hold
length”.
Write Timings
Parameter
Data Out Valid before NWE
High
NWE Pulse Width
NBS0/A0 NBS1, NBS2/A1,
NBS3, A2 - A25 valid
before NWE low
NCS low before NWE high
NWE High to Data OUT,
NBS0/A0 NBS1, NBS2/A1,
NBS3, A2 - A25 change
NWE High to NCS Inactive
(1)
NWE High to Data OUT,
NBS0/A0 NBS1, NBS2/A1,
NBS3, A2 - A25, NCS
change
Min Period/Max Frequency
with No Hold settings
(1)
HOLD or NO HOLD SETTINGS (nwe hold
+ nwe pulse) * t
(nwe setup - ncs rd setup
(nwe hold - ncs wr hold)*
nwe pulse * t
nwe pulse * t
nwe setup * t
nwe hold * t
NO HOLD SETTINGS (nwe hold = 0)
HOLD SETTINGS (nwe hold
1.8V Supply
t
CPMCK
11.4
1.9
CPMCK
CPMCK
CPMCK
CPMCK
- 4.0
CPMCK
- 4.8
- 3.9
- 3.2
- 4.2
- 4.2
Min
+ nwe pulse) * t
(nwe setup - ncs rd setup
(nwe hold - ncs wr hold)*
nwe pulse * t
nwe pulse * t
nwe setup * t
nwe hold * t
3.3V Supply
t
CPMCK
0, nwe hold = 0)
0)
1.5
9.7
CPMCK
CPMCK
CPMCK
CPMCK
- 3.5
CPMCK
- 4.0
- 3.9
- 3.2
- 4.0
- 4.2
Supply
1.8 V
87
Max
SAM9G25
SAM9G25
Supply
3.3 V
103
Units
MHz
ns/
ns
1107
1107
ns
ns
ns
ns
ns
ns