SAM9G25 Atmel Corporation, SAM9G25 Datasheet - Page 341

• Manufacturer Part Number: SAM9G25
• Manufacturer: Atmel Corporation

Specifications of SAM9G25

• Flash (kbytes): 0 Kbytes
• Pin Count: 247
• Max. Operating Frequency: 400 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 105
• Ext Interrupts: 105
• Usb Transceiver: 3
• Usb Speed: Hi-Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 3
• Uart: 7
• Lin: 4
• Ssc: 1
• Ethernet: 1
• Sd / Emmc: 2
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: Yes
• Adc Channels: 12
• Adc Resolution (bits): 10
• Adc Speed (ksps): 440
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 32
• Self Program Memory: NO
• External Bus Interface: 1
• Dram Memory: DDR2/LPDDR, SDRAM/LPSDR
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 0.9 to 1.1
• Fpu: No
• Mpu / Mmu: No/Yes
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

27. Programmable Multibit ECC Controller (PMECC)
27.1
27.2
11032A–ATARM–27-Jul-11
Description
Embedded Characteristics
The PMECC Controller is a programmable binary BCH (Bose, Chaudhuri and Hocquenghem)
encoder/decoder. This controller can be used to generate redundancy information for both Sin-
gle-Level Cell (SLC) and Multi-level Cell (MLC) NAND Flash devices. It supports redundancy for
correction of 2, 4, 8, 12 or 24 bits of error per sector of data.
• Multibit Error Correcting Code.
• Algorithm based on binary shortened Bose, Chaudhuri and Hocquenghem (BCH) codes.
• Programmable Error Correcting Capability: 2, 4, 8, 12 and 24 bit of errors per sector.
• Programmable Sector Size: 512 bytes or 1024 bytes.
• Programmable Number of Sectors per page: 1, 2, 4 or 8 sectors of data per page.
• Programmable Spare Area Size.
• Supports Spare Area ECC Protection.
• Supports 8 kbytes page size using 1024 bytes per sector and 4 kbytes page size using 512
• Configurable through APB interface
• Multibit Error Detection is Interrupt Driven.
bytes per sector.
SAM9G25
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