SAM9G25 Atmel Corporation, SAM9G25 Datasheet - Page 1139

• Manufacturer Part Number: SAM9G25
• Manufacturer: Atmel Corporation

Specifications of SAM9G25

• Flash (kbytes): 0 Kbytes
• Pin Count: 247
• Max. Operating Frequency: 400 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 105
• Ext Interrupts: 105
• Usb Transceiver: 3
• Usb Speed: Hi-Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 3
• Uart: 7
• Lin: 4
• Ssc: 1
• Ethernet: 1
• Sd / Emmc: 2
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: Yes
• Adc Channels: 12
• Adc Resolution (bits): 10
• Adc Speed (ksps): 440
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 32
• Self Program Memory: NO
• External Bus Interface: 1
• Dram Memory: DDR2/LPDDR, SDRAM/LPSDR
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 0.9 to 1.1
• Fpu: No
• Mpu / Mmu: No/Yes
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

25 Bus Matrix (MATRIX) ............................................................................ 301
26 External Bus Interface (EBI) ................................................................ 321
27 Programmable Multibit ECC Controller (PMECC) ............................. 341
28 Programmable Multibit ECC Error Location Controller
29 Static Memory Controller (SMC) ......................................................... 385
11032A–ATARM–27-Jul-11
(PMERRLOC) ........................................................................................ 371
24.3 Block Diagram ...................................................................................................278
24.4 Product Dependencies ......................................................................................279
24.5 UART Operations ..............................................................................................279
24.6 Debug Unit (DBGU) User Interface ...................................................................286
25.1 Description .........................................................................................................301
25.2 Embedded Characteristics ................................................................................301
25.3 Memory Mapping ...............................................................................................304
25.4 Special Bus Granting Mechanism .....................................................................304
25.5 Arbitration ..........................................................................................................305
25.6 Write Protect Registers ......................................................................................308
25.7 Bus Matrix (MATRIX) User Interface .................................................................309
26.1 Description .........................................................................................................321
26.2 Embedded Characteristics ................................................................................321
26.3 EBI Block Diagram ............................................................................................322
26.4 I/O Lines Description .........................................................................................323
26.5 Application Example ..........................................................................................324
27.1 Description .........................................................................................................341
27.2 Embedded Characteristics ................................................................................341
27.3 Block Diagram ...................................................................................................342
27.4 Functional Description .......................................................................................343
27.5 Software Implementation ...................................................................................349
27.6 Programmable Multibit ECC Controller (PMECC) User Interface .....................354
28.1 Description .........................................................................................................371
28.2 Embedded Characteristics ................................................................................371
28.3 Block Diagram ...................................................................................................371
28.4 Functional Description .......................................................................................372
28.5 Programmable Multibit ECC Error Location (PMERRLOC) User Interface .......373
29.1 Description .........................................................................................................385
29.2 Embedded Characteristics ................................................................................385
SAM9G25
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