SAM9G25 Atmel Corporation, SAM9G25 Datasheet - Page 1032

no-image

SAM9G25

Manufacturer Part Number
SAM9G25
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM9G25

Flash (kbytes)
0 Kbytes
Pin Count
247
Max. Operating Frequency
400 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
105
Ext Interrupts
105
Usb Transceiver
3
Usb Speed
Hi-Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
3
Uart
7
Lin
4
Ssc
1
Ethernet
1
Sd / Emmc
2
Graphic Lcd
No
Video Decoder
No
Camera Interface
Yes
Adc Channels
12
Adc Resolution (bits)
10
Adc Speed (ksps)
440
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
32
Self Program Memory
NO
External Bus Interface
1
Dram Memory
DDR2/LPDDR, SDRAM/LPSDR
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
0.9 to 1.1
Fpu
No
Mpu / Mmu
No/Yes
Timers
6
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
44.5.22
Name:
Address:
Access:
Reset:
• C_FETCH: Descriptor Fetch Control Field
0: Codec channel fetch operation is disabled.
1: Codec channel fetch operation is enabled.
• C_WB: Descriptor Writeback Control Field
0: Codec channel writeback operation is disabled.
1: Codec channel writeback operation is enabled.
• C_IEN: Transfer Done flag control
0: Codec Transfer done flag generation is enabled.
1: Codec Transfer done flag generation is disabled.
• C_DONE: (This field is only updated in the memory.)
0: The transfer related to this descriptor has not been performed.
1: The transfer related to this descriptor has completed. This field is updated in memory at the end of the transfer, when.
writeback operation is enabled.
1032
1032
31
23
15
7
SAM9G25
SAM9G25
DMA Codec Control Register
DMA_C_CTRL
0xF8048054
Read-write
0x00000000
30
22
14
6
29
21
13
5
28
20
12
4
C_DONE
27
19
11
3
C_IEN
26
18
10
2
C_WB
25
17
9
1
11032A–ATARM–27-Jul-11
11032A–ATARM–27-Jul-11
C_FETCH
24
16
8
0

Related parts for SAM9G25